Resolve "Errors found running AIR for ARM on QEMU"

Closes #4

See merge request AIR/rtems5!5

Resolve "Adjust ZYNQ linkcmds.in memory regions"

Closes #6

See merge request AIR/rtems5!7

Resolve "linkcmds.in needs to be automatically reconfigured"

Closes #5

See merge request AIR/rtems5!6

The linkcmds.in now uses the values included from the AIR partition linkcmds.inc allowing proper partition configuration.

A syscall is used before a context switch to notify AIR that the current exception is finished although it has not yet been returned.

Removed unnecessary AIR syscall in arm_cp15_set_exception_handler.
Applied minor simplification to bootcard.c

Replaced the bsp reset by a syscall to raise a HM event.

Resolve "Virtualize ARM abort handlers"

Closes #3

See merge request AIR/rtems5!4

Resolve "Resolve "Two RTEMS SMP bugs""

See merge request AIR/rtems5!3

score: Fix _User_extensions_Thread_switch() (SMP)
We have to read the first node again once we obtained the lock since it
may have aready changed.

https://urldefense.proofpoint.com/v2/url?u=https-3A__git.rtems.org_rtems_commit_-3Fid-3D26333f2ad09fc2ecd574fb167862520493c63ee3&d=DwIFaQ&c=CIoxZ4z5BqFvKvSGFOTo726QZIiNTc_M9CmngT-Pla4&r=v-lVx69fJMSpXvZ3wnlpSdNjZbk0VdSApJKYhGPt7fA&m=0UUC0tV62VUT_ZyjIN7QUKIfbWI9ya2vrAcGT4_Ku74&s=I_cJ0xu7vKfBHWOIlEZb1YQMu8HRcjOSTOCYiPDYXR8&e=

score: Fix plain priority thread queues (SMP)
We must add/remove the priority queue to the FIFO of priority queues.

https://urldefense.proofpoint.com/v2/url?u=https-3A__git.rtems.org_rtems_commit_-3Fid-3Dfbd08066af13beda4abdb25717f66d0a943fc5c8&d=DwIFaQ&c=CIoxZ4z5BqFvKvSGFOTo726QZIiNTc_M9CmngT-Pla4&r=v-lVx69fJMSpXvZ3wnlpSdNjZbk0VdSApJKYhGPt7fA&m=0UUC0tV62VUT_ZyjIN7QUKIfbWI9ya2vrAcGT4_Ku74&s=OMJvsA1r2Oe7hGz3X3rEgYYvgevnRueI2Rt69ItyF_8&e=

Now the SP is the same at the beginning and at the end of the handler

Applies changes on the current version of RTEMS

refs #172499

refs #172499

TODO: AIR should provide clkirq

refs #172499

refs #172499

refs #172499

refs #172499

toolchain rtems-5.1-2019.07.25, as used by TASTE toolchain.

refs #215682

refs #201957

refs #11122

- after leaving the flush trap rtems may jump to a pending trap (clock for example) so the g6 restore may not happen that leads to _ISR_handler executing with a wrong g6.

refs #123832

AIR RTEMS5: Simplify clock tick handler. More testing to do but execution was hanging up while testing smpmutex02 and was stuck in Clock_isr

refs #112319

refs #112319

AIR doesn't allow RTEMS to set %sp to the processor specific temporary
interrupt stack, and paravirtualizes access to this stack.
Needs to be thoroughly tested. Currently working with testsuites tmfine01
and smpmrsp01.

refs #112319

refs #112319

not fully tested. Cache fixes.

RETL instruction needs two delay slots when returning from trap, so an
extra instruction isn't performed. This can be seen when when the RETT
instruction is followed by RETL instruction. The instruction on the RETT
delay slot is skipped and the next intruction performed on the delay
slot.
Stack pointer on thread context switch was being set by RTEMS to the
bottom of an interrupt stack frame, so that when the aprtition context
switch occured momory area relevant to the application waws overwritten.
This issues is being further investigated as this might not be a
definite fix.

refs #112319

AIR RTEMS SMP: Add syscall to disable traps just like RTEMS expects and remove AIR mpstatus register since it would boot the processor again

refs #112319

refs #112319