...
 
Commits (39)
......@@ -6,6 +6,8 @@ compiler:
cache:
directories:
- "${HOME}/persist"
env:
- MAKEOPTS="-j4"
before_script:
# Extra CPython versions
......@@ -26,33 +28,33 @@ before_script:
- python3 --version
script:
- make -C mpy-cross
- make -C ports/minimal CROSS=1 build/firmware.bin
- make ${MAKEOPTS} -C mpy-cross
- make ${MAKEOPTS} -C ports/minimal CROSS=1 build/firmware.bin
- ls -l ports/minimal/build/firmware.bin
- tools/check_code_size.sh
- mkdir -p ${HOME}/persist
# Save new firmware for reference, but only if building a main branch, not a pull request
- 'if [ "$TRAVIS_PULL_REQUEST" = "false" ]; then cp ports/minimal/build/firmware.bin ${HOME}/persist/; fi'
- make -C ports/unix deplibs
- make -C ports/unix
- make -C ports/unix nanbox
- make -C ports/bare-arm
- make -C ports/qemu-arm -f Makefile.test test
- make -C ports/stm32
- make -C ports/stm32 BOARD=PYBV11 MICROPY_PY_WIZNET5K=5200 MICROPY_PY_CC3K=1
- make -C ports/stm32 BOARD=STM32F769DISC
- make -C ports/stm32 BOARD=STM32L476DISC
- make -C ports/teensy
- make -C ports/cc3200 BTARGET=application BTYPE=release
- make -C ports/cc3200 BTARGET=bootloader BTYPE=release
- make -C ports/windows CROSS_COMPILE=i686-w64-mingw32-
- make ${MAKEOPTS} -C ports/unix deplibs
- make ${MAKEOPTS} -C ports/unix
- make ${MAKEOPTS} -C ports/unix nanbox
- make ${MAKEOPTS} -C ports/bare-arm
- make ${MAKEOPTS} -C ports/qemu-arm -f Makefile.test test
- make ${MAKEOPTS} -C ports/stm32
- make ${MAKEOPTS} -C ports/stm32 BOARD=PYBV11 MICROPY_PY_WIZNET5K=5200 MICROPY_PY_CC3K=1
- make ${MAKEOPTS} -C ports/stm32 BOARD=STM32F769DISC
- make ${MAKEOPTS} -C ports/stm32 BOARD=STM32L476DISC
- make ${MAKEOPTS} -C ports/teensy
- make ${MAKEOPTS} -C ports/cc3200 BTARGET=application BTYPE=release
- make ${MAKEOPTS} -C ports/cc3200 BTARGET=bootloader BTYPE=release
- make ${MAKEOPTS} -C ports/windows CROSS_COMPILE=i686-w64-mingw32-
# run tests without coverage info
#- (cd tests && MICROPY_CPYTHON3=python3.4 ./run-tests)
#- (cd tests && MICROPY_CPYTHON3=python3.4 ./run-tests --emit native)
# run tests with coverage info
- make -C ports/unix coverage
- make ${MAKEOPTS} -C ports/unix coverage
- (cd tests && MICROPY_CPYTHON3=python3.4 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests)
- (cd tests && MICROPY_CPYTHON3=python3.4 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests -d thread)
- (cd tests && MICROPY_CPYTHON3=python3.4 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests --emit native)
......@@ -66,7 +68,7 @@ script:
# run tests on stackless build
- rm -rf ports/unix/build-coverage
- make -C ports/unix coverage CFLAGS_EXTRA="-DMICROPY_STACKLESS=1 -DMICROPY_STACKLESS_STRICT=1"
- make ${MAKEOPTS} -C ports/unix coverage CFLAGS_EXTRA="-DMICROPY_STACKLESS=1 -DMICROPY_STACKLESS_STRICT=1"
- (cd tests && MICROPY_CPYTHON3=python3.4 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests)
after_failure:
......
......@@ -187,11 +187,12 @@ Methods
Return ``True`` if any message waiting on the FIFO, else ``False``.
.. method:: CAN.recv(fifo, \*, timeout=5000)
.. method:: CAN.recv(fifo, list=None, \*, timeout=5000)
Receive data on the bus:
- *fifo* is an integer, which is the FIFO to receive on
- *list* is an optional list object to be used as the return value
- *timeout* is the timeout in milliseconds to wait for the receive.
Return value: A tuple containing four values.
......@@ -201,6 +202,24 @@ Methods
- The FMI (Filter Match Index) value.
- An array containing the data.
If *list* is ``None`` then a new tuple will be allocated, as well as a new
bytes object to contain the data (as the fourth element in the tuple).
If *list* is not ``None`` then it should be a list object with a least four
elements. The fourth element should be a memoryview object which is created
from either a bytearray or an array of type 'B' or 'b', and this array must
have enough room for at least 8 bytes. The list object will then be
populated with the first three return values above, and the memoryview object
will be resized inplace to the size of the data and filled in with that data.
The same list and memoryview objects can be reused in subsequent calls to
this method, providing a way of receiving data without using the heap.
For example::
buf = bytearray(8)
lst = [0, 0, 0, memoryview(buf)]
# No heap memory is allocated in the following call
can.recv(0, lst)
.. method:: CAN.send(data, id, \*, timeout=0, rtr=False)
Send a message on the bus:
......
......@@ -10,3 +10,5 @@ here1
123
here2
[1, 2]
444
[0, 1, 2]
......@@ -40,3 +40,16 @@ def gen6():
g = gen6()
print(list(g))
# StopIteration from within a Python function, within a native iterator (map), within a yield from
def gen7(x):
if x < 3:
return x
else:
raise StopIteration(444)
def gen8():
print((yield from map(gen7, range(100))))
g = gen8()
print(list(g))
......@@ -15,3 +15,8 @@ raised StopIteration
31
30
raising MyStopIteration
(4, 3, 2, 1, 0)
(11, 10)
raising MyStopIteration
(31, 30)
raised TypeError
......@@ -68,3 +68,12 @@ except StopIteration:
for i in myiter(32):
print(i)
# repeat some of the above tests but use tuple() to walk the iterator (tests mp_iternext)
print(tuple(myiter(5)))
print(tuple(myiter(12)))
print(tuple(myiter(32)))
try:
tuple(myiter(22))
except TypeError:
print('raised TypeError')
Subproject commit 000df50c233083c7bea05d1fed6fa191a65694bb
Subproject commit 90b9961963b625db0f2aabfe8e5e508b1f4fb7f1
......@@ -61,9 +61,9 @@ CFLAGS_CORTEX_M += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
endif
# Options for particular MCU series
CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -DMCU_SERIES_F4
CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7 -DMCU_SERIES_F7
CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -DMCU_SERIES_L4
CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7
CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
CFLAGS_MCU_h7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7
CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_MOD) $(CFLAGS_EXTRA)
......@@ -72,6 +72,7 @@ CFLAGS += $(CFLAGS_MCU_$(MCU_SERIES))
CFLAGS += $(COPT)
CFLAGS += -Iboards/$(BOARD)
CFLAGS += -DSTM32_HAL_H='<stm32$(MCU_SERIES)xx_hal.h>'
CFLAGS += -DMICROPY_HW_VTOR=$(TEXT0_ADDR)
ifeq ($(MICROPY_FLOAT_IMPL),double)
CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_DOUBLE
......@@ -80,7 +81,7 @@ CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_FLOAT
CFLAGS += -fsingle-precision-constant -Wdouble-promotion
endif
LDFLAGS = -nostdlib -L $(LD_DIR) -T $(LD_FILE) -Map=$(@:.elf=.map) --cref
LDFLAGS = -nostdlib -L $(LD_DIR) $(addprefix -T,$(LD_FILES)) -Map=$(@:.elf=.map) --cref
LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
# Remove uncalled code from the final image.
......@@ -251,9 +252,9 @@ SRC_C = \
SRC_O = \
$(STARTUP_FILE) \
resethandler.o \
gchelper.o \
$(BUILD)/$(HAL_DIR)/Src/%.o: CFLAGS += -fno-strict-aliasing
SRC_HAL = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\
hal.c \
hal_adc.c \
......@@ -388,24 +389,47 @@ else
$(Q)$(DFU_UTIL) -a 0 -d $(DEVICE) -D $<
endif
FLASH_ADDR ?= 0x08000000
TEXT_ADDR ?= 0x08020000
# A board should specify TEXT0_ADDR if to use a different location than the
# default for the firmware memory location. A board can also optionally define
# TEXT1_ADDR to split the firmware into two sections; see below for details.
TEXT0_ADDR ?= 0x08000000
ifeq ($(TEXT1_ADDR),)
# No TEXT1_ADDR given so put all firmware at TEXT0_ADDR location
deploy-stlink: $(BUILD)/firmware.dfu
$(ECHO) "Writing $(BUILD)/firmware.bin to the board via ST-LINK"
$(Q)$(STFLASH) write $(BUILD)/firmware.bin $(TEXT0_ADDR)
deploy-openocd: $(BUILD)/firmware.dfu
$(ECHO) "Writing $(BUILD)/firmware.bin to the board via ST-LINK using OpenOCD"
$(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "stm_flash $(BUILD)/firmware.bin $(TEXT0_ADDR)"
$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf
$(ECHO) "Create $@"
$(Q)$(OBJCOPY) -O binary -j .isr_vector -j .text -j .data $^ $(BUILD)/firmware.bin
$(Q)$(PYTHON) $(DFU) -b $(TEXT0_ADDR):$(BUILD)/firmware.bin $@
else
# TEXT0_ADDR and TEXT1_ADDR are specified so split firmware between these locations
deploy-stlink: $(BUILD)/firmware.dfu
$(ECHO) "Writing $(BUILD)/firmware0.bin to the board via ST-LINK"
$(Q)$(STFLASH) write $(BUILD)/firmware0.bin $(FLASH_ADDR)
$(Q)$(STFLASH) write $(BUILD)/firmware0.bin $(TEXT0_ADDR)
$(ECHO) "Writing $(BUILD)/firmware1.bin to the board via ST-LINK"
$(Q)$(STFLASH) --reset write $(BUILD)/firmware1.bin $(TEXT_ADDR)
$(Q)$(STFLASH) --reset write $(BUILD)/firmware1.bin $(TEXT1_ADDR)
deploy-openocd: $(BUILD)/firmware.dfu
$(ECHO) "Writing $(BUILD)/firmware{0,1}.bin to the board via ST-LINK using OpenOCD"
$(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "stm_flash $(BUILD)/firmware0.bin $(FLASH_ADDR) $(BUILD)/firmware1.bin $(TEXT_ADDR)"
$(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "stm_flash $(BUILD)/firmware0.bin $(TEXT0_ADDR) $(BUILD)/firmware1.bin $(TEXT1_ADDR)"
$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf
$(ECHO) "GEN $@"
$(Q)$(OBJCOPY) -O binary -j .isr_vector $^ $(BUILD)/firmware0.bin
$(Q)$(OBJCOPY) -O binary -j .text -j .data $^ $(BUILD)/firmware1.bin
$(Q)$(PYTHON) $(DFU) -b $(FLASH_ADDR):$(BUILD)/firmware0.bin -b $(TEXT_ADDR):$(BUILD)/firmware1.bin $@
$(Q)$(PYTHON) $(DFU) -b $(TEXT0_ADDR):$(BUILD)/firmware0.bin -b $(TEXT1_ADDR):$(BUILD)/firmware1.bin $@
endif
$(BUILD)/firmware.hex: $(BUILD)/firmware.elf
$(ECHO) "GEN $@"
......
......@@ -30,7 +30,6 @@
#include "py/mphal.h"
#include "py/runtime.h"
#include "pin.h"
#include "genhdr/pins.h"
#include "i2c.h"
#include "accel.h"
......@@ -57,8 +56,8 @@
void accel_init(void) {
// PB5 is connected to AVDD; pull high to enable MMA accel device
mp_hal_pin_low(&MICROPY_HW_MMA_AVDD_PIN); // turn off AVDD
mp_hal_pin_output(&MICROPY_HW_MMA_AVDD_PIN);
mp_hal_pin_low(MICROPY_HW_MMA_AVDD_PIN); // turn off AVDD
mp_hal_pin_output(MICROPY_HW_MMA_AVDD_PIN);
}
STATIC void accel_start(void) {
......@@ -74,9 +73,9 @@ STATIC void accel_start(void) {
i2c_init(&I2CHandle1);
// turn off AVDD, wait 30ms, turn on AVDD, wait 30ms again
mp_hal_pin_low(&MICROPY_HW_MMA_AVDD_PIN); // turn off
mp_hal_pin_low(MICROPY_HW_MMA_AVDD_PIN); // turn off
mp_hal_delay_ms(30);
mp_hal_pin_high(&MICROPY_HW_MMA_AVDD_PIN); // turn on
mp_hal_pin_high(MICROPY_HW_MMA_AVDD_PIN); // turn on
mp_hal_delay_ms(30);
HAL_StatusTypeDef status;
......
......@@ -32,7 +32,6 @@
#include "py/mphal.h"
#include "adc.h"
#include "pin.h"
#include "genhdr/pins.h"
#include "timer.h"
#if MICROPY_HW_ENABLE_ADC
......@@ -56,7 +55,7 @@
#define ADCx_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
#define ADC_NUM_CHANNELS (19)
#if defined(MCU_SERIES_F4)
#if defined(STM32F4)
#define ADC_FIRST_GPIO_CHANNEL (0)
#define ADC_LAST_GPIO_CHANNEL (15)
......@@ -64,7 +63,7 @@
#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2))
#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4))
#elif defined(MCU_SERIES_F7)
#elif defined(STM32F7)
#define ADC_FIRST_GPIO_CHANNEL (0)
#define ADC_LAST_GPIO_CHANNEL (15)
......@@ -78,7 +77,7 @@
#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2))
#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4))
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
#define ADC_FIRST_GPIO_CHANNEL (1)
#define ADC_LAST_GPIO_CHANNEL (16)
......@@ -127,7 +126,7 @@ typedef struct _pyb_obj_adc_t {
// convert user-facing channel number into internal channel number
static inline uint32_t adc_get_internal_channel(uint32_t channel) {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
// on F4 and F7 MCUs we want channel 16 to always be the TEMPSENSOR
// (on some MCUs ADC_CHANNEL_TEMPSENSOR=16, on others it doesn't)
if (channel == 16) {
......@@ -138,9 +137,9 @@ static inline uint32_t adc_get_internal_channel(uint32_t channel) {
}
STATIC bool is_adcx_channel(int channel) {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
return IS_ADC_CHANNEL(channel);
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
ADC_HandleTypeDef handle;
handle.Instance = ADCx;
return IS_ADC_CHANNEL(&handle, channel);
......@@ -151,9 +150,9 @@ STATIC bool is_adcx_channel(int channel) {
STATIC void adc_wait_for_eoc_or_timeout(int32_t timeout) {
uint32_t tickstart = HAL_GetTick();
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
while ((ADCx->SR & ADC_FLAG_EOC) != ADC_FLAG_EOC) {
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
while (READ_BIT(ADCx->ISR, ADC_FLAG_EOC) != ADC_FLAG_EOC) {
#else
#error Unsupported processor
......@@ -165,9 +164,9 @@ STATIC void adc_wait_for_eoc_or_timeout(int32_t timeout) {
}
STATIC void adcx_clock_enable(void) {
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
ADCx_CLK_ENABLE();
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
__HAL_RCC_ADC_CLK_ENABLE();
#else
#error Unsupported processor
......@@ -186,9 +185,9 @@ STATIC void adc_init_single(pyb_obj_adc_t *adc_obj) {
mp_hal_gpio_clock_enable(pin->gpio);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.Pin = pin->pin_mask;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
GPIO_InitStructure.Mode = GPIO_MODE_ANALOG;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
GPIO_InitStructure.Mode = GPIO_MODE_ANALOG_ADC_CONTROL;
#else
#error Unsupported processor
......@@ -209,12 +208,12 @@ STATIC void adc_init_single(pyb_obj_adc_t *adc_obj) {
adcHandle->Init.NbrOfConversion = 1;
adcHandle->Init.DMAContinuousRequests = DISABLE;
adcHandle->Init.Resolution = ADC_RESOLUTION_12B;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
adcHandle->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
adcHandle->Init.ScanConvMode = DISABLE;
adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1;
adcHandle->Init.EOCSelection = DISABLE;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
adcHandle->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
adcHandle->Init.ScanConvMode = ADC_SCAN_DISABLE;
adcHandle->Init.EOCSelection = ADC_EOC_SINGLE_CONV;
......@@ -229,7 +228,7 @@ STATIC void adc_init_single(pyb_obj_adc_t *adc_obj) {
HAL_ADC_Init(adcHandle);
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
ADC_MultiModeTypeDef multimode;
multimode.Mode = ADC_MODE_INDEPENDENT;
if (HAL_ADCEx_MultiModeConfigChannel(adcHandle, &multimode) != HAL_OK)
......@@ -244,9 +243,9 @@ STATIC void adc_config_channel(ADC_HandleTypeDef *adc_handle, uint32_t channel)
sConfig.Channel = channel;
sConfig.Rank = 1;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
sConfig.SamplingTime = ADC_SAMPLETIME_15CYCLES;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
sConfig.SamplingTime = ADC_SAMPLETIME_12CYCLES_5;
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
......@@ -411,9 +410,9 @@ STATIC mp_obj_t adc_read_timed(mp_obj_t self_in, mp_obj_t buf_in, mp_obj_t freq_
HAL_ADC_Start(&self->handle);
} else {
// for subsequent samples we can just set the "start sample" bit
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
ADCx->CR2 |= (uint32_t)ADC_CR2_SWSTART;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
SET_BIT(ADCx->CR, ADC_CR_ADSTART);
#else
#error Unsupported processor
......@@ -513,11 +512,11 @@ void adc_init_all(pyb_adc_all_obj_t *adc_all, uint32_t resolution, uint32_t en_m
adcHandle->Init.NbrOfConversion = 1;
adcHandle->Init.DMAContinuousRequests = DISABLE;
adcHandle->Init.EOCSelection = DISABLE;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
adcHandle->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
adcHandle->Init.ScanConvMode = DISABLE;
adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
adcHandle->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2;
adcHandle->Init.ScanConvMode = ADC_SCAN_DISABLE;
adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_CC1;
......@@ -578,7 +577,7 @@ float adc_read_core_vbat(ADC_HandleTypeDef *adcHandle) {
// be 12-bits.
raw_value <<= (12 - adc_get_resolution(adcHandle));
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
// ST docs say that (at least on STM32F42x and STM32F43x), VBATE must
// be disabled when TSVREFE is enabled for TEMPSENSOR and VREFINT
// conversions to work. VBATE is enabled by the above call to read
......
......@@ -3,6 +3,7 @@ CMSIS_MCU = STM32L475xx
# The stm32l475 does not have a LDC controller which is
# the only diffrence to the stm32l476 - so reuse some files.
AF_FILE = boards/stm32l476_af.csv
LD_FILE = boards/stm32l476xg.ld
TEXT_ADDR = 0x08004000
LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08004000
OPENOCD_CONFIG = boards/openocd_stm32l4.cfg
MCU_SERIES = f4
CMSIS_MCU = STM32F405xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F401xE
AF_FILE = boards/stm32f401_af.csv
LD_FILE = boards/stm32f401xd.ld
LD_FILES = boards/stm32f401xd.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
# Don't include default frozen modules because MCU is tight on flash space
FROZEN_MPY_DIR ?=
MCU_SERIES = f4
CMSIS_MCU = STM32F405xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = l4
CMSIS_MCU = STM32L476xx
AF_FILE = boards/stm32l476_af.csv
LD_FILE = boards/stm32l476xe.ld
TEXT_ADDR = 0x08004000
LD_FILES = boards/stm32l476xe.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08004000
MCU_SERIES = f4
CMSIS_MCU = STM32F405xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F401xE
AF_FILE = boards/stm32f401_af.csv
LD_FILE = boards/stm32f401xe.ld
LD_FILES = boards/stm32f401xe.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F411xE
AF_FILE = boards/stm32f411_af.csv
LD_FILE = boards/stm32f411.ld
LD_FILES = boards/stm32f411.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F429xx
AF_FILE = boards/stm32f429_af.csv
LD_FILE = boards/stm32f429.ld
LD_FILES = boards/stm32f429.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F446xx
AF_FILE = boards/stm32f429_af.csv
LD_FILE = boards/stm32f411.ld
LD_FILES = boards/stm32f411.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f7
CMSIS_MCU = STM32F746xx
AF_FILE = boards/stm32f746_af.csv
LD_FILE = boards/stm32f746.ld
LD_FILES = boards/stm32f746.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
......@@ -2,4 +2,6 @@ MCU_SERIES = f7
CMSIS_MCU = STM32F767xx
MICROPY_FLOAT_IMPL = double
AF_FILE = boards/stm32f767_af.csv
LD_FILE = boards/stm32f767.ld
LD_FILES = boards/stm32f767.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
......@@ -6,6 +6,7 @@
#define MICROPY_HW_ENABLE_USB (1)
#define MICROPY_HW_HAS_SWITCH (1)
#define MICROPY_HW_HAS_FLASH (1)
#define MICROPY_HW_HAS_SDCARD (1)
#define MICROPY_BOARD_EARLY_INIT NUCLEO_H743ZI_board_early_init
void NUCLEO_H743ZI_board_early_init(void);
......@@ -27,10 +28,10 @@ void NUCLEO_H743ZI_board_early_init(void);
#define MICROPY_HW_UART_REPL_BAUD 115200
// I2C busses
//#define MICROPY_HW_I2C1_SCL (pin_B8)
//#define MICROPY_HW_I2C1_SDA (pin_B9)
//#define MICROPY_HW_I2C3_SCL (pin_H7)
//#define MICROPY_HW_I2C3_SDA (pin_H8)
#define MICROPY_HW_I2C1_SCL (pin_B8)
#define MICROPY_HW_I2C1_SDA (pin_B9)
#define MICROPY_HW_I2C2_SCL (pin_F1)
#define MICROPY_HW_I2C2_SDA (pin_F0)
// SPI
//#define MICROPY_HW_SPI2_NSS (pin_I0)
......@@ -55,3 +56,8 @@ void NUCLEO_H743ZI_board_early_init(void);
#define MICROPY_HW_USB_FS (1)
#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9)
#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10)
// SD card detect switch
#define MICROPY_HW_SDCARD_DETECT_PIN (pin_G2)
#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP)
#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET)
......@@ -2,5 +2,6 @@ MCU_SERIES = h7
CMSIS_MCU = STM32H743xx
MICROPY_FLOAT_IMPL = double
AF_FILE = boards/stm32h743_af.csv
LD_FILE = boards/stm32h743.ld
TEXT_ADDR = 0x08040000
LD_FILES = boards/stm32h743.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08040000
......@@ -30,16 +30,18 @@ TP3,PH15
AUDIO_INT,PD6
AUDIO_SDA,PH8
AUDIO_SCL,PH7
EXT_SDA,PB9
EXT_SCL,PB8
I2C1_SDA,PB9
I2C1_SCL,PB8
I2C2_SDA,PF0
I2C2_SCL,PF1
EXT_RST,PG3
SD_D0,PG9
SD_D1,PG10
SD_D2,PB3
SD_D3,PB4
SD_CK,PD6
SD_CMD,PD7
SD_SW,PI15
SD_D0,PC8
SD_D1,PC9
SD_D2,PC10
SD_D3,PC11
SD_CMD,PD2
SD_CK,PC12
SD_SW,PG2
LCD_BL_CTRL,PK3
LCD_INT,PI13
LCD_SDA,PH8
......
......@@ -168,7 +168,7 @@
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */
#define USE_RTOS 0
#define USE_SD_TRANSCEIVER 1U /*!< use uSD Transceiver */
#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */
/* ########################### Ethernet Configuration ######################### */
#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */
......
MCU_SERIES = l4
CMSIS_MCU = STM32L476xx
AF_FILE = boards/stm32l476_af.csv
LD_FILE = boards/stm32l476xg.ld
TEXT_ADDR = 0x08004000
LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08004000
MCU_SERIES = f4
CMSIS_MCU = STM32F407xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F411xE
AF_FILE = boards/stm32f411_af.csv
LD_FILE = boards/stm32f411.ld
LD_FILES = boards/stm32f411.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F405xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F405xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F405xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F405xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F411xE
AF_FILE = boards/stm32f411_af.csv
LD_FILE = boards/stm32f411.ld
LD_FILES = boards/stm32f411.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F429xx
AF_FILE = boards/stm32f429_af.csv
LD_FILE = boards/stm32f429.ld
LD_FILES = boards/stm32f429.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F439xx
AF_FILE = boards/stm32f439_af.csv
LD_FILE = boards/stm32f439.ld
LD_FILES = boards/stm32f439.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f4
CMSIS_MCU = STM32F407xx
AF_FILE = boards/stm32f405_af.csv
LD_FILE = boards/stm32f405.ld
LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
......@@ -2,4 +2,6 @@ MCU_SERIES = f7
CMSIS_MCU = STM32F769xx
MICROPY_FLOAT_IMPL = double
AF_FILE = boards/stm32f767_af.csv
LD_FILE = boards/stm32f769.ld
LD_FILES = boards/stm32f769.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
MCU_SERIES = f7
CMSIS_MCU = STM32F746xx
AF_FILE = boards/stm32f746_af.csv
LD_FILE = boards/stm32f746.ld
LD_FILES = boards/stm32f746.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08020000
#include "storage.h"
#include "genhdr/pins.h"
// External SPI flash uses standard SPI interface
......@@ -7,14 +6,14 @@ const mp_soft_spi_obj_t soft_spi_bus = {
.delay_half = MICROPY_HW_SOFTSPI_MIN_DELAY,
.polarity = 0,
.phase = 0,
.sck = &MICROPY_HW_SPIFLASH_SCK,
.mosi = &MICROPY_HW_SPIFLASH_MOSI,
.miso = &MICROPY_HW_SPIFLASH_MISO,
.sck = MICROPY_HW_SPIFLASH_SCK,
.mosi = MICROPY_HW_SPIFLASH_MOSI,
.miso = MICROPY_HW_SPIFLASH_MISO,
};
const mp_spiflash_config_t spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_SPI,
.bus.u_spi.cs = &MICROPY_HW_SPIFLASH_CS,
.bus.u_spi.cs = MICROPY_HW_SPIFLASH_CS,
.bus.u_spi.data = (void*)&soft_spi_bus,
.bus.u_spi.proto = &mp_soft_spi_proto,
};
......
#include "py/mphal.h"
#include "genhdr/pins.h"
void STM32L476DISC_board_early_init(void) {
// set SPI flash WP and HOLD pins high
mp_hal_pin_output(&pin_E14);
mp_hal_pin_output(&pin_E15);
mp_hal_pin_write(&pin_E14, 1);
mp_hal_pin_write(&pin_E15, 1);
mp_hal_pin_output(pin_E14);
mp_hal_pin_output(pin_E15);
mp_hal_pin_write(pin_E14, 1);
mp_hal_pin_write(pin_E15, 1);
}
MCU_SERIES = l4
CMSIS_MCU = STM32L476xx
AF_FILE = boards/stm32l476_af.csv
LD_FILE = boards/stm32l476xg.ld
TEXT_ADDR = 0x08004000
LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x08004000
OPENOCD_CONFIG = boards/openocd_stm32l4.cfg
/* Memory layout for basic configuration:
FLASH .isr_vector
FLASH .text
FLASH .data
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
/* Memory layout for bootloader configuration (this here describes the app part):
FLASH_APP .isr_vector
FLASH_APP .text
FLASH_APP .data
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH_APP
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_APP
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_APP
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
/* Memory layout for internal flash storage configuration:
FLASH_ISR .isr_vector
FLASH_TEXT .text
FLASH_TEXT .data
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/
ENTRY(Reset_Handler)
/* define output sections */
......
......@@ -207,18 +207,18 @@ class Pin(object):
print("// ", end='')
print('};')
print('')
print('const pin_obj_t pin_{:s} = PIN({:s}, {:d}, {:s}, {:s}, {:d});'.format(
print('const pin_obj_t pin_{:s}_obj = PIN({:s}, {:d}, {:s}, {:s}, {:d});'.format(
self.cpu_pin_name(), self.port_letter(), self.pin,
self.alt_fn_name(null_if_0=True),
self.adc_num_str(), self.adc_channel))
print('')
def print_header(self, hdr_file):
hdr_file.write('extern const pin_obj_t pin_{:s};\n'.
format(self.cpu_pin_name()))
n = self.cpu_pin_name()
hdr_file.write('extern const pin_obj_t pin_{:s}_obj;\n'.format(n))
hdr_file.write('#define pin_{:s} (&pin_{:s}_obj)\n'.format(n, n))
if self.alt_fn_count > 0:
hdr_file.write('extern const pin_af_obj_t pin_{:s}_af[];\n'.
format(self.cpu_pin_name()))
hdr_file.write('extern const pin_af_obj_t pin_{:s}_af[];\n'.format(n))
def qstr_list(self):
result = []
......@@ -287,7 +287,7 @@ class Pins(object):
for named_pin in named_pins:
pin = named_pin.pin()
if pin.is_board_pin():
print(' {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},'.format(named_pin.name(), pin.cpu_pin_name()))
print(' {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}_obj) }},'.format(named_pin.name(), pin.cpu_pin_name()))
print('};')
print('MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);'.format(label, label));
......@@ -305,13 +305,13 @@ class Pins(object):
print('const pin_obj_t * const pin_adc{:d}[] = {{'.format(adc_num))
for channel in range(17):
if channel == 16:
print('#if defined(MCU_SERIES_L4)')
print('#if defined(STM32L4)')
adc_found = False
for named_pin in self.cpu_pins:
pin = named_pin.pin()
if (pin.is_board_pin() and
(pin.adc_num & (1 << (adc_num - 1))) and (pin.adc_channel == channel)):
print(' &pin_{:s}, // {:d}'.format(pin.cpu_pin_name(), channel))
print(' &pin_{:s}_obj, // {:d}'.format(pin.cpu_pin_name(), channel))
adc_found = True
break
if not adc_found:
......
......@@ -21,9 +21,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -21,9 +21,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -22,9 +22,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -21,9 +21,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -22,9 +22,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -21,9 +21,6 @@ _minimum_heap_size = 16K;
/* top end of the stack */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -22,9 +22,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -7,6 +7,7 @@ MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 2016K /* sectors 1-11 3x32K 1*128K 7*256K */
FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */
......@@ -22,9 +23,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -22,9 +22,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -22,9 +22,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -22,9 +22,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -24,9 +24,6 @@ _minimum_heap_size = 16K;
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* define common sections and symbols */
INCLUDE common.ld
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
......
......@@ -29,8 +29,10 @@
#include <stdarg.h>
#include "py/objtuple.h"
#include "py/objarray.h"
#include "py/runtime.h"
#include "py/gc.h"
#include "py/binary.h"
#include "py/stream.h"
#include "py/mperrno.h"
#include "py/mphal.h"
......@@ -645,18 +647,20 @@ STATIC mp_obj_t pyb_can_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
}
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_send_obj, 1, pyb_can_send);
/// \method recv(fifo, *, timeout=5000)
/// \method recv(fifo, list=None, *, timeout=5000)
///
/// Receive data on the bus:
///
/// - `fifo` is an integer, which is the FIFO to receive on
/// - `list` if not None is a list with at least 4 elements
/// - `timeout` is the timeout in milliseconds to wait for the receive.
///
/// Return value: buffer of data bytes.
STATIC mp_obj_t pyb_can_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
enum { ARG_fifo, ARG_timeout };
enum { ARG_fifo, ARG_list, ARG_timeout };
static const mp_arg_t allowed_args[] = {
{ MP_QSTR_fifo, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
{ MP_QSTR_list, MP_ARG_OBJ, {.u_obj = mp_const_none} },
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
};
......@@ -700,23 +704,49 @@ STATIC mp_obj_t pyb_can_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
}
}
// return the received data
// TODO use a namedtuple (when namedtuple types can be stored in ROM)
mp_obj_tuple_t *tuple = mp_obj_new_tuple(4, NULL);
if (rx_msg.IDE == CAN_ID_STD) {
tuple->items[0] = MP_OBJ_NEW_SMALL_INT(rx_msg.StdId);
// Create the tuple, or get the list, that will hold the return values
// Also populate the fourth element, either a new bytes or reuse existing memoryview
mp_obj_t ret_obj = args[ARG_list].u_obj;
mp_obj_t *items;
if (ret_obj == mp_const_none) {
ret_obj = mp_obj_new_tuple(4, NULL);
items = ((mp_obj_tuple_t*)MP_OBJ_TO_PTR(ret_obj))->items;
items[3] = mp_obj_new_bytes(&rx_msg.Data[0], rx_msg.DLC);
} else {
tuple->items[0] = MP_OBJ_NEW_SMALL_INT(rx_msg.ExtId);
// User should provide a list of length at least 4 to hold the values
if (!MP_OBJ_IS_TYPE(ret_obj, &mp_type_list)) {
mp_raise_TypeError(NULL);
}
mp_obj_list_t *list = MP_OBJ_TO_PTR(ret_obj);
if (list->len < 4) {
mp_raise_ValueError(NULL);
}
items = list->items;
// Fourth element must be a memoryview which we assume points to a
// byte-like array which is large enough, and then we resize it inplace
if (!MP_OBJ_IS_TYPE(items[3], &mp_type_memoryview)) {
mp_raise_TypeError(NULL);
}
mp_obj_array_t *mv = MP_OBJ_TO_PTR(items[3]);
if (!(mv->typecode == (0x80 | BYTEARRAY_TYPECODE)
|| (mv->typecode | 0x20) == (0x80 | 'b'))) {
mp_raise_ValueError(NULL);
}
mv->len = rx_msg.DLC;
memcpy(mv->items, &rx_msg.Data[0], rx_msg.DLC);
}
tuple->items[1] = rx_msg.RTR == CAN_RTR_REMOTE ? mp_const_true : mp_const_false;
tuple->items[2] = MP_OBJ_NEW_SMALL_INT(rx_msg.FMI);
vstr_t vstr;
vstr_init_len(&vstr, rx_msg.DLC);
for (mp_uint_t i = 0; i < rx_msg.DLC; i++) {
vstr.buf[i] = rx_msg.Data[i]; // Data is uint32_t but holds only 1 byte
// Populate the first 3 values of the tuple/list
if (rx_msg.IDE == CAN_ID_STD) {
items[0] = MP_OBJ_NEW_SMALL_INT(rx_msg.StdId);
} else {
items[0] = MP_OBJ_NEW_SMALL_INT(rx_msg.ExtId);
}
tuple->items[3] = mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr);
return tuple;
items[1] = rx_msg.RTR == CAN_RTR_REMOTE ? mp_const_true : mp_const_false;
items[2] = MP_OBJ_NEW_SMALL_INT(rx_msg.FMI);
// Return the result
return ret_obj;
}
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_recv_obj, 1, pyb_can_recv);
......
......@@ -33,7 +33,6 @@
#include "dac.h"
#include "dma.h"
#include "pin.h"
#include "genhdr/pins.h"
/// \moduleref pyb
/// \class DAC - digital to analog conversion
......@@ -159,9 +158,9 @@ STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, size_t n_args, const mp
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
// DAC peripheral clock
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7)
__DAC_CLK_ENABLE();
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
__HAL_RCC_DAC1_CLK_ENABLE();
#else
#error Unsupported Processor
......@@ -213,9 +212,9 @@ STATIC mp_obj_t pyb_dac_make_new(const mp_obj_type_t *type, size_t n_args, size_
dac_id = mp_obj_get_int(args[0]);
} else {
const pin_obj_t *pin = pin_find(args[0]);
if (pin == &pin_A4) {
if (pin == pin_A4) {
dac_id = 1;
} else if (pin == &pin_A5) {
} else if (pin == pin_A5) {
dac_id = 2;
} else {
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%q) doesn't have DAC capabilities", pin->name));
......
This diff is collapsed.
......@@ -28,7 +28,7 @@
typedef struct _dma_descr_t dma_descr_t;
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
extern const dma_descr_t dma_I2C_1_RX;
extern const dma_descr_t dma_SPI_3_RX;
......@@ -57,7 +57,7 @@ extern const dma_descr_t dma_SDMMC_2_TX;
extern const dma_descr_t dma_SPI_6_RX;
extern const dma_descr_t dma_SDIO_0_TX;
#elif defined(MCU_SERIES_L4)
#elif defined(STM32L4)
extern const dma_descr_t dma_ADC_1_RX;
extern const dma_descr_t dma_ADC_2_RX;
......
......@@ -89,7 +89,7 @@
// register in an atomic fashion by using bitband addressing.
#define EXTI_MODE_BB(mode, line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + (mode)) * 32) + ((line) * 4)))
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
// The L4 MCU supports 40 Events/IRQs lines of the type configurable and direct.
// Here we only support configurable line types. Details, see page 330 of RM0351, Rev 1.
// The USB_FS_WAKUP event is a direct type and there is no support for it.
......@@ -137,7 +137,7 @@ STATIC const uint8_t nvic_irq_channel[EXTI_NUM_VECTORS] = {
EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn,
EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn,
EXTI15_10_IRQn,
#if defined(MCU_SERIES_L4)
#if defined(STM32L4)
PVD_PVM_IRQn,
#else
PVD_IRQn,
......@@ -282,7 +282,7 @@ void extint_enable(uint line) {
if (line >= EXTI_NUM_VECTORS) {
return;
}
#if defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7)
// The Cortex-M7 doesn't have bitband support.
mp_uint_t irq_state = disable_irq();
if (pyb_extint_mode[line] == EXTI_Mode_Interrupt) {
......@@ -312,7 +312,7 @@ void extint_disable(uint line) {
return;
}
#if defined(MCU_SERIES_F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7)
// The Cortex-M7 doesn't have bitband support.
mp_uint_t irq_state = disable_irq();
#if defined(STM32H7)
......@@ -337,7 +337,7 @@ void extint_swint(uint line) {