Commit 7e7fb0b7 authored by Dave Hylands's avatar Dave Hylands Committed by Damien George
Browse files

stmhal: Renamed startup/system/_it.[ch] file to generic names.

parent ea8bf810
...@@ -101,8 +101,8 @@ SRC_LIB = $(addprefix lib/,\ ...@@ -101,8 +101,8 @@ SRC_LIB = $(addprefix lib/,\
SRC_C = \ SRC_C = \
main.c \ main.c \
system_stm32f4xx.c \ system_stm32.c \
stm32f4xx_it.c \ stm32_it.c \
usbd_conf.c \ usbd_conf.c \
usbd_desc.c \ usbd_desc.c \
usbd_cdc_interface.c \ usbd_cdc_interface.c \
...@@ -155,9 +155,9 @@ SRC_C = \ ...@@ -155,9 +155,9 @@ SRC_C = \
dac.c \ dac.c \
adc.c \ adc.c \
SRC_S = \ SRC_O = \
startup_stm32f40xx.s \ startup_stm32.o \
gchelper.s \ gchelper.o \
SRC_HAL = $(addprefix $(HAL_DIR)/src/stm32$(MCU_SERIES)xx_,\ SRC_HAL = $(addprefix $(HAL_DIR)/src/stm32$(MCU_SERIES)xx_,\
hal.c \ hal.c \
...@@ -240,7 +240,7 @@ OBJ = ...@@ -240,7 +240,7 @@ OBJ =
OBJ += $(PY_O) OBJ += $(PY_O)
OBJ += $(addprefix $(BUILD)/, $(SRC_LIB:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_LIB:.c=.o))
OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_O))
OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o))
OBJ += $(addprefix $(BUILD)/, $(SRC_USBDEV:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_USBDEV:.c=.o))
OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o))
......
/** /**
****************************************************************************** ******************************************************************************
* @file startup_stm32f407xx.s * @file startup_stm32f407xx.s
* @author MCD Application Team * @author MCD Application Team
* @version V2.0.0 * @version V2.0.0
* @date 18-February-2014 * @date 18-February-2014
* @brief STM32F407xx Devices vector table for Atollic TrueSTUDIO toolchain. * @brief STM32F407xx Devices vector table for Atollic TrueSTUDIO toolchain.
* This module performs: * This module performs:
* - Set the initial SP * - Set the initial SP
* - Set the initial PC == Reset_Handler, * - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address * - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually * - Branches to main in the C library (which eventually
* calls main()). * calls main()).
* After Reset the Cortex-M4 processor is in Thread mode, * After Reset the Cortex-M4 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main. * priority is Privileged, and the Stack is set to Main.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
.syntax unified .syntax unified
.cpu cortex-m4 .cpu cortex-m4
.fpu softvfp .fpu softvfp
.thumb .thumb
.global g_pfnVectors .global g_pfnVectors
.global Default_Handler .global Default_Handler
/* start address for the initialization values of the .data section. /* start address for the initialization values of the .data section.
defined in linker script */ defined in linker script */
.word _sidata .word _sidata
/* start address for the .data section. defined in linker script */ /* start address for the .data section. defined in linker script */
.word _sdata .word _sdata
/* end address for the .data section. defined in linker script */ /* end address for the .data section. defined in linker script */
.word _edata .word _edata
/* start address for the .bss section. defined in linker script */ /* start address for the .bss section. defined in linker script */
.word _sbss .word _sbss
/* end address for the .bss section. defined in linker script */ /* end address for the .bss section. defined in linker script */
.word _ebss .word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
/** /**
* @brief This is the code that gets called when the processor first * @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely * starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application * necessary set is performed, after which the application
* supplied main() routine is called. * supplied main() routine is called.
* @param None * @param None
* @retval : None * @retval : None
*/ */
.section .text.Reset_Handler .section .text.Reset_Handler
.weak Reset_Handler .weak Reset_Handler
.type Reset_Handler, %function .type Reset_Handler, %function
Reset_Handler: Reset_Handler:
ldr sp, =_estack /* set stack pointer */ ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */ /* Copy the data segment initializers from flash to SRAM */
movs r1, #0 movs r1, #0
b LoopCopyDataInit b LoopCopyDataInit
CopyDataInit: CopyDataInit:
ldr r3, =_sidata ldr r3, =_sidata
ldr r3, [r3, r1] ldr r3, [r3, r1]
str r3, [r0, r1] str r3, [r0, r1]
adds r1, r1, #4 adds r1, r1, #4
LoopCopyDataInit: LoopCopyDataInit:
ldr r0, =_sdata ldr r0, =_sdata
ldr r3, =_edata ldr r3, =_edata
adds r2, r0, r1 adds r2, r0, r1
cmp r2, r3 cmp r2, r3
bcc CopyDataInit bcc CopyDataInit
ldr r2, =_sbss ldr r2, =_sbss
b LoopFillZerobss b LoopFillZerobss
/* Zero fill the bss segment. */ /* Zero fill the bss segment. */
FillZerobss: FillZerobss:
movs r3, #0 movs r3, #0
str r3, [r2], #4 str r3, [r2], #4
LoopFillZerobss: LoopFillZerobss:
ldr r3, = _ebss ldr r3, = _ebss
cmp r2, r3 cmp r2, r3
bcc FillZerobss bcc FillZerobss
/* Call the clock system intitialization function.*/ /* Call the clock system intitialization function.*/
bl SystemInit bl SystemInit
/* Call static constructors */ /* Call static constructors */
/*bl __libc_init_array*/ /*bl __libc_init_array*/
/* Call the application's entry point.*/ /* Call the application's entry point.*/
bl main bl main
bx lr bx lr
.size Reset_Handler, .-Reset_Handler .size Reset_Handler, .-Reset_Handler
/** /**
* @brief This is the code that gets called when the processor receives an * @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving * unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger. * the system state for examination by a debugger.
* @param None * @param None
* @retval None * @retval None
*/ */
.section .text.Default_Handler,"ax",%progbits .section .text.Default_Handler,"ax",%progbits
Default_Handler: Default_Handler:
Infinite_Loop: Infinite_Loop:
b Infinite_Loop b Infinite_Loop
.size Default_Handler, .-Default_Handler .size Default_Handler, .-Default_Handler
/****************************************************************************** /******************************************************************************
* *
* The minimal vector table for a Cortex M3. Note that the proper constructs * The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address * must be placed on this to ensure that it ends up at physical address
* 0x0000.0000. * 0x0000.0000.
* *
*******************************************************************************/ *******************************************************************************/
.section .isr_vector,"a",%progbits .section .isr_vector,"a",%progbits
.type g_pfnVectors, %object .type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors .size g_pfnVectors, .-g_pfnVectors
g_pfnVectors: g_pfnVectors:
.word _estack .word _estack
.word Reset_Handler .word Reset_Handler
.word NMI_Handler .word NMI_Handler
.word HardFault_Handler .word HardFault_Handler
.word MemManage_Handler .word MemManage_Handler
.word BusFault_Handler .word BusFault_Handler
.word UsageFault_Handler .word UsageFault_Handler
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word SVC_Handler .word SVC_Handler
.word DebugMon_Handler .word DebugMon_Handler
.word 0 .word 0
.word PendSV_Handler .word PendSV_Handler
.word SysTick_Handler .word SysTick_Handler
/* External Interrupts */ /* External Interrupts */
.word WWDG_IRQHandler /* Window WatchDog */ .word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detection */ .word PVD_IRQHandler /* PVD through EXTI Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
.word FLASH_IRQHandler /* FLASH */ .word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */ .word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line0 */ .word EXTI0_IRQHandler /* EXTI Line0 */
.word EXTI1_IRQHandler /* EXTI Line1 */ .word EXTI1_IRQHandler /* EXTI Line1 */
.word EXTI2_IRQHandler /* EXTI Line2 */ .word EXTI2_IRQHandler /* EXTI Line2 */
.word EXTI3_IRQHandler /* EXTI Line3 */ .word EXTI3_IRQHandler /* EXTI Line3 */
.word EXTI4_IRQHandler /* EXTI Line4 */ .word EXTI4_IRQHandler /* EXTI Line4 */
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word CAN1_TX_IRQHandler /* CAN1 TX */ .word CAN1_TX_IRQHandler /* CAN1 TX */
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */ .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */ .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */ .word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EXTI9_5_IRQHandler /* External Line[9:5]s */ .word EXTI9_5_IRQHandler /* External Line[9:5]s */
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */ .word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */ .word TIM3_IRQHandler /* TIM3 */
.word TIM4_IRQHandler /* TIM4 */ .word TIM4_IRQHandler /* TIM4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */ .word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */ .word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */ .word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */ .word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */ .word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */ .word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */ .word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */ .word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */ .word USART3_IRQHandler /* USART3 */
.word EXTI15_10_IRQHandler /* External Line[15:10]s */ .word EXTI15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
.word FSMC_IRQHandler /* FSMC */ .word FSMC_IRQHandler /* FSMC */
.word SDIO_IRQHandler /* SDIO */ .word SDIO_IRQHandler /* SDIO */
.word TIM5_IRQHandler /* TIM5 */ .word TIM5_IRQHandler /* TIM5 */
.word SPI3_IRQHandler /* SPI3 */ .word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */ .word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */ .word UART5_IRQHandler /* UART5 */
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
.word TIM7_IRQHandler /* TIM7 */ .word TIM7_IRQHandler /* TIM7 */
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
.word ETH_IRQHandler /* Ethernet */ .word ETH_IRQHandler /* Ethernet */
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
.word CAN2_TX_IRQHandler /* CAN2 TX */ .word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */ .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */ .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */ .word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* USB OTG FS */ .word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */ .word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */ .word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */ .word I2C3_ER_IRQHandler /* I2C3 error */
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
.word OTG_HS_IRQHandler /* USB OTG HS */ .word OTG_HS_IRQHandler /* USB OTG HS */
.word DCMI_IRQHandler /* DCMI */ .word DCMI_IRQHandler /* DCMI */
.word 0 /* CRYP crypto */ .word 0 /* CRYP crypto */
.word HASH_RNG_IRQHandler /* Hash and Rng */ .word HASH_RNG_IRQHandler /* Hash and Rng */
.word FPU_IRQHandler /* FPU */ .word FPU_IRQHandler /* FPU */
/******************************************************************************* /*******************************************************************************
* *
* Provide weak aliases for each Exception handler to the Default_Handler. * Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override * As they are weak aliases, any function with the same name will override
* this definition. * this definition.
* *
*******************************************************************************/ *******************************************************************************/
.weak NMI_Handler .weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler .thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler .weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler .thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler .weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler .thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler .weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler .thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler .weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler .thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler .weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler .thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler .weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler .thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler .weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler .thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler .weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler .thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler .weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler .thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler .weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler .thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler .weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler .weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler .thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler .weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler .thumb_set FLASH_IRQHandler,Default_Handler