Commit 75abee20 authored by Damien George's avatar Damien George
Browse files

stm: USB host mode working! Restructure stm library directories.

parent 8fcf7b85
......@@ -27,9 +27,9 @@
*/
/* Includes ------------------------------------------------------------------*/
#include "stm_misc.h"
#include "stm32f4xx_gpio.h"
#include "stm32f4xx_rcc.h"
#include "stm_misc.h"
#include "usb_bsp.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
......@@ -97,7 +97,7 @@
void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev) {
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
/* Configure DM DP Pins */
/* Configure DM DP Pins on PA11 and PA12 */
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
......@@ -109,7 +109,7 @@ void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev) {
GPIO_PinAFConfig(GPIOA, GPIO_PinSource11, GPIO_AF_OTG_FS);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource12, GPIO_AF_OTG_FS);
/* Configure VBUS Pin (or disable VBUS_SENSING_ENABLED) */
/* Configure VBUS Pin on PA9 (or disable VBUS_SENSING_ENABLED) */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
......@@ -117,8 +117,7 @@ void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev) {
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/*
// Configure ID pin (only in host mode)
// Configure ID pin on PA10
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
......@@ -126,7 +125,6 @@ void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev) {
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_OTG_FS);
*/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE);
......@@ -235,7 +233,7 @@ void USB_OTG_BSP_ConfigVBUS(USB_OTG_CORE_HANDLE *pdev) {
void USB_OTG_BSP_uDelay (const uint32_t usec)
{
uint32_t count = 0;
const uint32_t utime = (160 * usec / 5);
const uint32_t utime = (168 * usec / 5);
do
{
if ( ++count > utime )
......
......@@ -237,9 +237,9 @@
/* END host specific stuff */
/****************** USB OTG MODE CONFIGURATION ********************************/
//#define USE_HOST_MODE // set in Makefile
#define USE_DEVICE_MODE
//#define USE_OTG_MODE // set in Makefile
//#define USE_HOST_MODE // set in mpconfigport.h
//#define USE_DEVICE_MODE // set in mpconfigport.h
//#define USE_OTG_MODE // set in mpconfigport.h
#ifndef USB_OTG_FS_CORE
#ifndef USB_OTG_HS_CORE
......
/**
******************************************************************************
* @file usb_hcd.c
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief Host Interface Layer
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "usb_core.h"
#include "usb_hcd.h"
#include "usb_conf.h"
#include "usb_bsp.h"
#ifdef USE_HOST_MODE
/** @addtogroup USB_OTG_DRIVER
* @{
*/
/** @defgroup USB_HCD
* @brief This file is the interface between EFSL ans Host mass-storage class
* @{
*/
/** @defgroup USB_HCD_Private_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Private_Functions
* @{
*/
/**
* @brief HCD_Init
* Initialize the HOST portion of the driver.
* @param pdev: Selected device
* @param base_address: OTG base address
* @retval Status
*/
uint32_t HCD_Init(USB_OTG_CORE_HANDLE *pdev ,
USB_OTG_CORE_ID_TypeDef coreID)
{
uint8_t i = 0;
pdev->host.ConnSts = 0;
for (i= 0; i< USB_OTG_MAX_TX_FIFOS; i++)
{
pdev->host.ErrCnt[i] = 0;
pdev->host.XferCnt[i] = 0;
pdev->host.HC_Status[i] = HC_IDLE;
}
pdev->host.hc[0].max_packet = 8;
USB_OTG_SelectCore(pdev, coreID);
#ifndef DUAL_ROLE_MODE_ENABLED
USB_OTG_DisableGlobalInt(pdev);
USB_OTG_CoreInit(pdev);
/* Force Host Mode*/
USB_OTG_SetCurrentMode(pdev , HOST_MODE);
USB_OTG_CoreInitHost(pdev);
USB_OTG_EnableGlobalInt(pdev);
#endif
return 0;
}
/**
* @brief HCD_GetCurrentSpeed
* Get Current device Speed.
* @param pdev : Selected device
* @retval Status
*/
uint32_t HCD_GetCurrentSpeed (USB_OTG_CORE_HANDLE *pdev)
{
USB_OTG_HPRT0_TypeDef HPRT0;
HPRT0.d32 = USB_OTG_READ_REG32(pdev->regs.HPRT0);
return HPRT0.b.prtspd;
}
/**
* @brief HCD_ResetPort
* Issues the reset command to device
* @param pdev : Selected device
* @retval Status
*/
uint32_t HCD_ResetPort(USB_OTG_CORE_HANDLE *pdev)
{
/*
Before starting to drive a USB reset, the application waits for the OTG
interrupt triggered by the debounce done bit (DBCDNE bit in OTG_FS_GOTGINT),
which indicates that the bus is stable again after the electrical debounce
caused by the attachment of a pull-up resistor on DP (FS) or DM (LS).
*/
USB_OTG_ResetPort(pdev);
return 0;
}
/**
* @brief HCD_IsDeviceConnected
* Check if the device is connected.
* @param pdev : Selected device
* @retval Device connection status. 1 -> connected and 0 -> disconnected
*
*/
uint32_t HCD_IsDeviceConnected(USB_OTG_CORE_HANDLE *pdev)
{
return (pdev->host.ConnSts);
}
/**
* @brief HCD_GetCurrentFrame
* This function returns the frame number for sof packet
* @param pdev : Selected device
* @retval Frame number
*
*/
uint32_t HCD_GetCurrentFrame (USB_OTG_CORE_HANDLE *pdev)
{
return (USB_OTG_READ_REG32(&pdev->regs.HREGS->HFNUM) & 0xFFFF) ;
}
/**
* @brief HCD_GetURB_State
* This function returns the last URBstate
* @param pdev: Selected device
* @retval URB_STATE
*
*/
URB_STATE HCD_GetURB_State (USB_OTG_CORE_HANDLE *pdev , uint8_t ch_num)
{
return pdev->host.URB_State[ch_num] ;
}
/**
* @brief HCD_GetXferCnt
* This function returns the last URBstate
* @param pdev: Selected device
* @retval No. of data bytes transferred
*
*/
uint32_t HCD_GetXferCnt (USB_OTG_CORE_HANDLE *pdev, uint8_t ch_num)
{
return pdev->host.XferCnt[ch_num] ;
}
/**
* @brief HCD_GetHCState
* This function returns the HC Status
* @param pdev: Selected device
* @retval HC_STATUS
*
*/
HC_STATUS HCD_GetHCState (USB_OTG_CORE_HANDLE *pdev , uint8_t ch_num)
{
return pdev->host.HC_Status[ch_num] ;
}
/**
* @brief HCD_HC_Init
* This function prepare a HC and start a transfer
* @param pdev: Selected device
* @param hc_num: Channel number
* @retval status
*/
uint32_t HCD_HC_Init (USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num)
{
return USB_OTG_HC_Init(pdev, hc_num);
}
/**
* @brief HCD_SubmitRequest
* This function prepare a HC and start a transfer
* @param pdev: Selected device
* @param hc_num: Channel number
* @retval status
*/
uint32_t HCD_SubmitRequest (USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num)
{
pdev->host.URB_State[hc_num] = URB_IDLE;
pdev->host.hc[hc_num].xfer_count = 0 ;
return USB_OTG_HC_StartXfer(pdev, hc_num);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif // USE_HOST_MODE
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/**
******************************************************************************
* @file usb_hcd.h
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief Host layer Header file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_HCD_H__
#define __USB_HCD_H__
/* Includes ------------------------------------------------------------------*/
#include "usb_regs.h"
#include "usb_core.h"
/** @addtogroup USB_OTG_DRIVER
* @{
*/
/** @defgroup USB_HCD
* @brief This file is the
* @{
*/
/** @defgroup USB_HCD_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_Exported_FunctionsPrototype
* @{
*/
uint32_t HCD_Init (USB_OTG_CORE_HANDLE *pdev ,
USB_OTG_CORE_ID_TypeDef coreID);
uint32_t HCD_HC_Init (USB_OTG_CORE_HANDLE *pdev ,
uint8_t hc_num);
uint32_t HCD_SubmitRequest (USB_OTG_CORE_HANDLE *pdev ,
uint8_t hc_num) ;
uint32_t HCD_GetCurrentSpeed (USB_OTG_CORE_HANDLE *pdev);
uint32_t HCD_ResetPort (USB_OTG_CORE_HANDLE *pdev);
uint32_t HCD_IsDeviceConnected (USB_OTG_CORE_HANDLE *pdev);
uint32_t HCD_GetCurrentFrame (USB_OTG_CORE_HANDLE *pdev) ;
URB_STATE HCD_GetURB_State (USB_OTG_CORE_HANDLE *pdev, uint8_t ch_num);
uint32_t HCD_GetXferCnt (USB_OTG_CORE_HANDLE *pdev, uint8_t ch_num);
HC_STATUS HCD_GetHCState (USB_OTG_CORE_HANDLE *pdev, uint8_t ch_num) ;
/**
* @}
*/
#endif //__USB_HCD_H__
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
This diff is collapsed.
/**
******************************************************************************
* @file usb_hcd_int.h
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief Peripheral Device Interface Layer
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __HCD_INT_H__
#define __HCD_INT_H__
/* Includes ------------------------------------------------------------------*/
#include "usb_hcd.h"
/** @addtogroup USB_OTG_DRIVER
* @{
*/
/** @defgroup USB_HCD_INT
* @brief This file is the
* @{
*/
/** @defgroup USB_HCD_INT_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_INT_Exported_Types
* @{
*/
typedef struct _USBH_HCD_INT
{
uint8_t (* SOF) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* DevConnected) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* DevDisconnected) (USB_OTG_CORE_HANDLE *pdev);
}USBH_HCD_INT_cb_TypeDef;
extern USBH_HCD_INT_cb_TypeDef *USBH_HCD_INT_fops;
/**
* @}
*/
/** @defgroup USB_HCD_INT_Exported_Macros
* @{
*/
#define CLEAR_HC_INT(HC_REGS, intr) \
{\
USB_OTG_HCINTn_TypeDef hcint_clear; \
hcint_clear.d32 = 0; \
hcint_clear.b.intr = 1; \
USB_OTG_WRITE_REG32(&((HC_REGS)->HCINT), hcint_clear.d32);\
}\
#define MASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
INTMSK.b.chhltd = 0; \
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
#define UNMASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
INTMSK.b.chhltd = 1; \
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
#define MASK_HOST_INT_ACK(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
INTMSK.b.ack = 0; \
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, GINTMSK.d32);}
#define UNMASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef INTMSK; \
INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
INTMSK.b.ack = 1; \
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
/**
* @}
*/
/** @defgroup USB_HCD_INT_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USB_HCD_INT_Exported_FunctionsPrototype
* @{
*/
/* Callbacks handler */
void ConnectCallback_Handler(USB_OTG_CORE_HANDLE *pdev);
void Disconnect_Callback_Handler(USB_OTG_CORE_HANDLE *pdev);
void Overcurrent_Callback_Handler(USB_OTG_CORE_HANDLE *pdev);
uint32_t USBH_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
/**
* @}
*/
#endif //__HCD_INT_H__
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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