Commit 339bdccc authored by Damien George's avatar Damien George
Browse files

Merge pull request #803 from dhylands/ld-opt

Put some code into the first 16K of flash
parents 8f81b5cb 3688414d
......@@ -200,6 +200,13 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_FATFS:.c=.o))
OBJ += $(addprefix $(BUILD)/, $(SRC_CC3K:.c=.o))
OBJ += $(BUILD)/pins_$(BOARD).o
# We put ff.o and stm32f4xx_hal_sd.o into the first 16K section with the ISRs.
# If we compile these using -O0 then it won't fit. So if you really want these
# to be compiled with -O0, then edit stm32f405.ld (in the .isr_vector section)
# and comment out the following 2 lines.
$(BUILD)/$(FATFS_DIR)/src/ff.o: COPT += -Os
$(BUILD)/$(HAL_DIR)/src/stm32f4xx_hal_sd.o: COPT += -Os
all: $(BUILD)/firmware.dfu $(BUILD)/firmware.hex
.PHONY: deploy
......
......@@ -34,6 +34,14 @@ SECTIONS
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. So we pull in a couple of object files to pad it
out. */
. = ALIGN(4);
*/ff.o(.text*)
*/stm32f4xx_hal_sd.o(.text*)
. = ALIGN(4);
} >FLASH_ISR
......@@ -41,9 +49,7 @@ SECTIONS
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
......@@ -78,7 +84,6 @@ SECTIONS
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
_ram_start = .; /* create a global symbol at ram start for garbage collector */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
......@@ -90,7 +95,6 @@ SECTIONS
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss)
*(.bss*)
*(COMMON)
......
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