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TASTE
uPython-mirror
Commits
0077958a
Commit
0077958a
authored
Dec 01, 2015
by
Dave Hylands
Committed by
Damien George
Dec 02, 2015
Browse files
stmhal: Put all DMA channel & stream definitions in dma.h
parent
d735278c
Changes
4
Hide whitespace changes
Inline
Side-by-side
stmhal/dac.c
View file @
0077958a
...
...
@@ -34,6 +34,7 @@
#include
"py/runtime.h"
#include
"timer.h"
#include
"dac.h"
#include
"dma.h"
#include
"pin.h"
#include
"genhdr/pins.h"
...
...
@@ -216,11 +217,11 @@ STATIC mp_obj_t pyb_dac_make_new(mp_obj_t type_in, mp_uint_t n_args, mp_uint_t n
if
(
dac_id
==
1
)
{
dac
->
pin
=
GPIO_PIN_4
;
dac
->
dac_channel
=
DAC_CHANNEL_1
;
dac
->
dma_stream
=
DMA
1
_S
tream5
;
dac
->
dma_stream
=
DMA_S
TREAM_DAC1
;
}
else
if
(
dac_id
==
2
)
{
dac
->
pin
=
GPIO_PIN_5
;
dac
->
dac_channel
=
DAC_CHANNEL_2
;
dac
->
dma_stream
=
DMA
1
_S
tream6
;
dac
->
dma_stream
=
DMA_S
TREAM_DAC2
;
}
else
{
nlr_raise
(
mp_obj_new_exception_msg_varg
(
&
mp_type_ValueError
,
"DAC %d does not exist"
,
dac_id
));
}
...
...
@@ -396,7 +397,7 @@ mp_obj_t pyb_dac_write_timed(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_
DMA_Handle
.
State
=
HAL_DMA_STATE_READY
;
HAL_DMA_DeInit
(
&
DMA_Handle
);
DMA_Handle
.
Init
.
Channel
=
DMA_CHANNEL_
7
;
DMA_Handle
.
Init
.
Channel
=
DMA_CHANNEL_
DAC1
;
// DAC1 & DAC2 both use the same channel
DMA_Handle
.
Init
.
Direction
=
DMA_MEMORY_TO_PERIPH
;
DMA_Handle
.
Init
.
PeriphInc
=
DMA_PINC_DISABLE
;
DMA_Handle
.
Init
.
MemInc
=
DMA_MINC_ENABLE
;
...
...
stmhal/dma.h
View file @
0077958a
...
...
@@ -24,12 +24,64 @@
* THE SOFTWARE.
*/
//TODO: Put stream/channel defs for i2c/spi/can, etc here
// These are ordered by DMAx_Stream number, and within a stream by channel
// number. The duplicate streams are ok as long as they aren't used at the
// same time.
//
// Currently I2C and SPI are synchronous and they call dma_init/dma_deinit
// around each transfer.
// DMA1 streams
#define DMA_STREAM_I2C1_RX DMA1_Stream0
#define DMA_CHANNEL_I2C1_RX DMA_CHANNEL_1
#define DMA_STREAM_SPI3_RX DMA1_Stream2
#define DMA_CHANNEL_SPI3_RX DMA_CHANNEL_0
#define DMA_STREAM_I2C3_RX DMA1_Stream2
#define DMA_CHANNEL_I2C3_RX DMA_CHANNEL_3
#define DMA_STREAM_I2C2_RX DMA1_Stream2
#define DMA_CHANNEL_I2C2_RX DMA_CHANNEL_7
#define DMA_STREAM_SPI2_RX DMA1_Stream3
#define DMA_CHANNEL_SPI2_RX DMA_CHANNEL_0
#define DMA_STREAM_SPI2_TX DMA1_Stream4
#define DMA_CHANNEL_SPI2_TX DMA_CHANNEL_0
#define DMA_STREAM_I2C3_TX DMA1_Stream4
#define DMA_CHANNEL_I2C3_TX DMA_CHANNEL_3
#define DMA_STREAM_DAC1 DMA1_Stream5
#define DMA_CHANNEL_DAC1 DMA_CHANNEL_7
#define DMA_STREAM_DAC2 DMA1_Stream6
#define DMA_CHANNEL_DAC2 DMA_CHANNEL_7
#define DMA_STREAM_SPI3_TX DMA1_Stream7
#define DMA_CHANNEL_SPI3_TX DMA_CHANNEL_0
#define DMA_STREAM_I2C1_TX DMA1_Stream7
#define DMA_CHANNEL_I2C1_TX DMA_CHANNEL_1
#define DMA_STREAM_I2C2_TX DMA1_Stream7
#define DMA_CHANNEL_I2C2_TX DMA_CHANNEL_7
// DMA2 streams
#define DMA_STREAM_SPI1_RX DMA2_Stream2
#define DMA_CHANNEL_SPI1_RX DMA_CHANNEL_3
#define DMA_STREAM_SDIO_RX DMA2_Stream3
#define DMA_CHANNEL_SDIO_RX DMA_CHANNEL_4
#define DMA_CHANNEL_SDIO_RX DMA_CHANNEL_4
#define DMA_STREAM_SPI1_TX DMA2_Stream5
#define DMA_CHANNEL_SPI1_TX DMA_CHANNEL_3
#define DMA_STREAM_SDIO_TX DMA2_Stream6
#define DMA_CHANNEL_SDIO_TX DMA_CHANNEL_4
#define DMA_CHANNEL_SDIO_TX
DMA_CHANNEL_4
typedef
union
{
uint16_t
enabled
;
// Used to test if both counters are == 0
...
...
stmhal/i2c.c
View file @
0077958a
...
...
@@ -134,17 +134,17 @@ I2C_HandleTypeDef I2CHandle3 = {.Instance = NULL};
STATIC
const
pyb_i2c_obj_t
pyb_i2c_obj
[]
=
{
#if defined(MICROPY_HW_I2C1_SCL)
{{
&
pyb_i2c_type
},
&
I2CHandle1
,
DMA
1
_S
tream7
,
DMA_CHANNEL_
1
,
DMA
1
_S
tream0
,
DMA_CHANNEL_
1
},
{{
&
pyb_i2c_type
},
&
I2CHandle1
,
DMA_S
TREAM_I2C1_TX
,
DMA_CHANNEL_
I2C1_TX
,
DMA_S
TREAM_I2C1_RX
,
DMA_CHANNEL_
I2C1_RX
},
#else
{{
&
pyb_i2c_type
},
NULL
,
NULL
,
0
,
NULL
,
0
},
#endif
#if defined(MICROPY_HW_I2C2_SCL)
{{
&
pyb_i2c_type
},
&
I2CHandle2
,
DMA
1
_S
tream7
,
DMA_CHANNEL_
7
,
DMA
1
_S
tream2
,
DMA_CHANNEL_
7
},
{{
&
pyb_i2c_type
},
&
I2CHandle2
,
DMA_S
TREAM_I2C2_TX
,
DMA_CHANNEL_
I2C2_TX
,
DMA_S
TREAM_I2C2_RX
,
DMA_CHANNEL_
I2C2_RX
},
#else
{{
&
pyb_i2c_type
},
NULL
,
NULL
,
0
,
NULL
,
0
},
#endif
#if defined(MICROPY_HW_I2C3_SCL)
{{
&
pyb_i2c_type
},
&
I2CHandle3
,
DMA
1
_S
tream4
,
DMA_CHANNEL_
3
,
DMA
1
_S
tream2
,
DMA_CHANNEL_
3
},
{{
&
pyb_i2c_type
},
&
I2CHandle3
,
DMA_S
TREAM_I2C3_TX
,
DMA_CHANNEL_
I2C3_TX
,
DMA_S
TREAM_I2C3_RX
,
DMA_CHANNEL_
I2C3_RX
},
#else
{{
&
pyb_i2c_type
},
NULL
,
NULL
,
0
,
NULL
,
0
},
#endif
...
...
stmhal/spi.c
View file @
0077958a
...
...
@@ -114,17 +114,17 @@ SPI_HandleTypeDef SPIHandle3 = {.Instance = NULL};
STATIC
const
pyb_spi_obj_t
pyb_spi_obj
[]
=
{
#if MICROPY_HW_ENABLE_SPI1
{{
&
pyb_spi_type
},
&
SPIHandle1
,
DMA
2
_S
tream5
,
DMA_CHANNEL_
3
,
DMA
2
_S
tream2
,
DMA_CHANNEL_
3
},
{{
&
pyb_spi_type
},
&
SPIHandle1
,
DMA_S
TREAM_SPI1_TX
,
DMA_CHANNEL_
SPI1_TX
,
DMA_S
TREAM_SPI1_RX
,
DMA_CHANNEL_
SPI1_RX
},
#else
{{
&
pyb_spi_type
},
NULL
,
NULL
,
0
,
NULL
,
0
},
#endif
#if MICROPY_HW_ENABLE_SPI2
{{
&
pyb_spi_type
},
&
SPIHandle2
,
DMA
1
_S
tream4
,
DMA_CHANNEL_
0
,
DMA
1
_S
tream3
,
DMA_CHANNEL_
0
},
{{
&
pyb_spi_type
},
&
SPIHandle2
,
DMA_S
TREAM_SPI2_TX
,
DMA_CHANNEL_
SPI2_TX
,
DMA_S
TREAM_SPI2_RX
,
DMA_CHANNEL_
SPI2_RX
},
#else
{{
&
pyb_spi_type
},
NULL
,
NULL
,
0
,
NULL
,
0
},
#endif
#if MICROPY_HW_ENABLE_SPI3
{{
&
pyb_spi_type
},
&
SPIHandle3
,
DMA
1
_S
tream7
,
DMA_CHANNEL_
0
,
DMA
1
_S
tream2
,
DMA_CHANNEL_
0
},
{{
&
pyb_spi_type
},
&
SPIHandle3
,
DMA_S
TREAM_SPI3_TX
,
DMA_CHANNEL_
SPI3_TX
,
DMA_S
TREAM_SPI3_RX
,
DMA_CHANNEL_
SPI3_RX
},
#else
{{
&
pyb_spi_type
},
NULL
,
NULL
,
0
,
NULL
,
0
},
#endif
...
...
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