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Commit f273c0c9 authored by Thanassis Tsiodras's avatar Thanassis Tsiodras
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add memory management service - work in progress

parent 413f8683
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ConcurrencyView_Properties.aadl 100644 → 100755
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File mode changed from 100644 to 100755
DataView.aadl 100644 → 100755
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DataView.acn 100644 → 100755
View file @ f273c0c9
......@@ -84,6 +84,7 @@ Taps DEFINITIONS ::= BEGIN
PUS <INTEGER: pus-type, INTEGER: pus-subtype> [] {
device-access <pus-subtype> [present-when pus-type == 2],
housekeeping <pus-subtype> [present-when pus-type == 3],
memory-management <pus-subtype> [present-when pus-type == 6],
time-management <pus-subtype> [present-when pus-type == 9],
time-scheduling <pus-subtype> [present-when pus-type == 11],
on-board-monitoring <pus-subtype> [present-when pus-type == 12],
......@@ -115,6 +116,15 @@ Taps DEFINITIONS ::= BEGIN
pus-3-31-new-col-int [present-when pus-subtype == 31]
}
PUS-6 <INTEGER: pus-subtype> [] {
pus-6-2-load-mem [present-when pus-subtype == 2],
pus-6-5-dump-mem [present-when pus-subtype == 5],
pus-6-12-abort-dumps [present-when pus-subtype == 12],
pus-6-13-enable-scrubbing [present-when pus-subtype == 13],
pus-6-14-disable-scrubbing [present-when pus-subtype == 14]
}
Address-inst[encoding pos-int, size 32]
PUS-9 <INTEGER: pus-subtype> [] {
pus-9-1-set-rate-exp [present-when pus-subtype == 1]
}
......@@ -166,6 +176,7 @@ Taps DEFINITIONS ::= BEGIN
tm5-2 [present-when tm-type==5 tm-subtype==2],
tm5-3 [present-when tm-type==5 tm-subtype==3],
tm5-4 [present-when tm-type==5 tm-subtype==4],
tm6-6 [present-when tm-type==6 tm-subtype==6],
tm11-13 [present-when tm-type==11 tm-subtype==13],
tm12-12 [present-when tm-type==12 tm-subtype==12],
tm12-14 [present-when tm-type==12 tm-subtype==14]
......
DataView.asn 100644 → 100755
View file @ f273c0c9
......@@ -158,6 +158,60 @@ BEGIN
END
--************************************************************************************************************************************************ ST[06]
-- Generic definitions for the Memory management service ST[06] service
Memory-Management-Structures DEFINITIONS ::=
BEGIN
-- the on board memory
On-Board-Memory{Memory-ID, Memory-Size, Address} ::= SEQUENCE {
id Memory-ID,
addr-Scheme ENUMERATED { absolute-addr, relative-addr},
mem-align-constr INTEGER(1..255),
memory-size Memory-Size,
start-address Address,
allowed-op ENUMERATED { read-only, read-and-write, write-only},
scrubbing BOOLEAN,
write-protection BOOLEAN
}
-- the list of the on-board memories
On-Board-Memory-List{INTEGER: onBoard-Memory-No, On-Board-Memory} ::= SEQUENCE ( SIZE(onBoard-Memory-No) ) OF On-Board-Memory
-- load raw memory data tc[6,2]
Load-Raw-Data{MemoryID, Load-Raw-Data-List} ::= SEQUENCE {
memory-id MemoryID,
load-list Load-Raw-Data-List
}
-- load raw memory data instruction list
Load-Raw-Data-List {INTEGER: max-Instr-No, Load-Raw-Data-Instr} ::= SEQUENCE ( SIZE(1..max-Instr-No) ) OF Load-Raw-Data-Instr
-- load raw memory data instruction
Load-Raw-Data-Instr{Address, INTEGER: max-No-Of-Octets} ::= SEQUENCE{
start-address Address,
data-to-load OCTET STRING ( SIZE(1.. max-No-Of-Octets) )
}
-- dump raw memory data tc[6,5]
Dump-Raw-Data{MemoryID, Dump-Raw-Data-List} ::= SEQUENCE {
memory-id MemoryID,
dump-list Dump-Raw-Data-List
}
-- dump raw memory data instruction list
Dump-Raw-Data-List {INTEGER: max-Instr-No, Dump-Raw-Data-Instr} ::= SEQUENCE ( SIZE(1..max-Instr-No) ) OF Dump-Raw-Data-Instr
-- dump raw memory data instruction
Dump-Raw-Data-Instr{Address, Memory-Length} ::= SEQUENCE{
start-address Address,
dump-length Memory-Length
}
-- abort all memory dumps - TC[6,12]
Abort-All-Dumps ::= SEQUENCE {}
-- enable/disable the scrubbing of a memory TC[6,13] & TC[6,14]
Scrabbing-Mem {MemoryID} ::= SEQUENCE {
memory-id MemoryID
}
END
--************************************************************************************************************************************************ ST[09]
-- Generic definitions for the Time management ST[09] service
Time-Management-Structures DEFINITIONS ::=
......@@ -357,6 +411,10 @@ FROM PUS-Implicit-Knowledge
FROM HK-Service-Structures
Event-Report, Event-Definition, Event-Definitions-List, Events-No
FROM Event-Reporting-Structures
On-Board-Memory, On-Board-Memory-List, Load-Raw-Data, Load-Raw-Data-List,
Load-Raw-Data-Instr, Dump-Raw-Data, Dump-Raw-Data-List, Dump-Raw-Data-Instr,
Abort-All-Dumps, Scrabbing-Mem
FROM Memory-Management-Structures
CDS-Time-Report, Rate-Exp-Value-91
FROM Time-Management-Structures
Schedule-Activity-Definition, Schedule-Activity-Def-List, Sch-Req-ID,
......@@ -397,6 +455,85 @@ APUserID ::= ENUMERATED {
-- the identifiers of the on-board parameters
On-board-params-IDs::= ENUMERATED { s1-vcc(5), s1-stat(6) }
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ST[01] inst
-- instantiate the Request verification service ST[01] service data structures
Start-Execution-Notification ::= SEQUENCE {
startExec BOOLEAN,
failureCode Start-Exec-failure-codes,
failureData INTEGER (0..255)
}
Progress-Execution-Notification ::= SEQUENCE {
step InstructionCounter,
progressExec BOOLEAN,
failureCode Progress-Exec-failure-codes,
failureData INTEGER (0..255)
}
Completion-Execution-Notification ::= SEQUENCE {
completionExec BOOLEAN,
failureCode Completion-Exec-failure-codes,
failureData INTEGER (0..255)
}
Failure-Notice-tm-1-2 ::= Failure-Notice {TM-1-2-failure-codes, Failure-Data-inst}
Failure-Notice-tm-1-4 ::= Failure-Notice {Start-Exec-failure-codes, Failure-Data-inst}
Failure-Notice-tm-1-6 ::= Failure-Notice {Progress-Exec-failure-codes , Failure-Data-inst}
Failure-Notice-tm-1-8 ::= Failure-Notice {Completion-Exec-failure-codes, Failure-Data-inst}
Failure-Notice-tm-1-10 ::= Failure-Notice {TM-1-10-failure-codes, Failure-Data-inst}
-- instantiate the failure notice data
Failure-Data-inst ::= INTEGER (0..255)
-- TM-1-2-failure-codes , ACN manage the "8 bits" constraint
TM-1-2-failure-codes ::= ENUMERATED {
reqIntegrityFailure(0),
serviceNotAvailable(1),
wrongRequestType(2)
}
-- Execution reporting data types
Start-Exec-failure-codes ::= ENUMERATED {
noFailure(0), startExecFailed(1), hk-def-already-present(2), hk-def-not-present(3), hk-def-enabled(4),
hk-param-duplicated(5), ev-act-list-full(6), ev-act-def-enabled(7), ev-act-ID-notFound(8), sch-act-list-full(9),
sch-act-too-late(10), load-raw-mem-failure(11), dump-mem-write-only(12), length-exceeds-packet-max-size(13),
dump-mem-outside-range(14), start-addr-not-aligned(15), data-length-not-aligned(16), length-exceeds-mem-size(17)
}
Progress-Exec-failure-codes ::= ENUMERATED {
noFailure(0),
progresExecFailed(1)
}
Completion-Exec-failure-codes ::= ENUMERATED {
noFailure(0),
completionExecFailed(1)
}
-- TM-1-10-failure-codes , ACN manage the "8 bits" constraint
TM-1-10-failure-codes ::= ENUMERATED {
reqIntegrityFailure(0), noDestinationFound(1), destinationNotReady(2)
}
TM-1-1 ::= Request-ID {APID, SEQ-COUNT}
TM-1-2 ::= TM-1-type1 {Request-ID-inst, Failure-Notice-tm-1-2}
TM-1-3 ::= Request-ID {APID, SEQ-COUNT}
TM-1-4 ::= TM-1-type1 {Request-ID-inst, Failure-Notice-tm-1-4}
TM-1-5 ::= SEQUENCE {
req-ID Request-ID {APID, SEQ-COUNT},
step InstructionCounter
}
TM-1-6 ::= SEQUENCE {
req-ID Request-ID {APID, SEQ-COUNT},
step InstructionCounter,
failureNotice Failure-Notice-tm-1-6
}
TM-1-7 ::= Request-ID {APID, SEQ-COUNT}
TM-1-8 ::= TM-1-type1 {Request-ID-inst, Failure-Notice-tm-1-8}
TM-1-10 ::= TM-1-type1 {Request-ID-inst, Failure-Notice-tm-1-10}
Request-ID-ACK ::= SEQUENCE{
requestID Request-ID-inst,
ack-successful-completion BOOLEAN,
ack-successful-progress BOOLEAN,
ack-successful-start BOOLEAN
}
-- Instantiate the request ID
Request-ID-inst ::= Request-ID {APID, SEQ-COUNT}
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ST[02] inst
-- On-off device addresses , ACN manage the "32 bits" constraint
On-off-dev-addr ::= ENUMERATED {
......@@ -570,6 +707,65 @@ maxEventsNo INTEGER ::= 100000
Events-No-Inst ::= Events-No{maxEventsNo}
maxEventNoInst Events-No-Inst ::= maxEventsNo
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ST[06] inst
-- instantiate the Memory management service ST[06] service data structures
-- instantiate the on board memory data structure
Memory-ID-inst ::= ENUMERATED { m-1, m-2 }
Memory-Size-inst ::= INTEGER(1 .. 4294967296)
On-Board-Memory-inst ::= On-Board-Memory{Memory-ID-inst, Memory-Size-inst, Address-inst}
-- the no of on-board memories
on-Board-Memories-No INTEGER(1..255) ::= 2
-- address the on-board memories
On-Board-Memories-Index ::= INTEGER(1..on-Board-Memories-No)
-- instantiate the list of the on-board memories
On-Board-Memory-List-inst ::= On-Board-Memory-List{on-Board-Memories-No, On-Board-Memory-inst}
-- declare the first on-board memory
memory-01 On-Board-Memory-inst ::= {id m-1, addr-Scheme absolute-addr, mem-align-constr 4, memory-size 2048, start-address 1024, allowed-op read-and-write, scrubbing TRUE, write-protection FALSE}
-- declare the first on-board memory
memory-02 On-Board-Memory-inst ::= {id m-2, addr-Scheme absolute-addr, mem-align-constr 4, memory-size 1024, start-address 3072, allowed-op read-only, scrubbing FALSE, write-protection TRUE}
-- add the memories to the list
memory-List On-Board-Memory-List-inst ::= {memory-01, memory-02}
-- instantiate the load raw memory data instruction
Load-Raw-Data-Instr-inst ::= Load-Raw-Data-Instr{Address-inst, max-No-Of-Octets}
Address-inst ::= INTEGER(1 .. 4294967295)
max-No-Of-Octets INTEGER(1 .. 255) ::= 20
-- hold the instruction data length
Data-To-Load-Length ::= INTEGER(1..max-No-Of-Octets)
-- instantiate the load raw memory data instruction list
Load-Raw-Data-List-inst ::= Load-Raw-Data-List {max-Instr-No, Load-Raw-Data-Instr-inst}
max-Load-Instr-No INTEGER(1 .. 255) ::= 6
-- load instruction index
Load-Instr-Index ::= INTEGER (1..max-Load-Instr-No)
-- instantiate the load raw memory data tc[6,2]
Load-Raw-Memory ::= Load-Raw-Data{Memory-ID-inst, Load-Raw-Data-List-inst}
-- instantiate the dump raw memory data tc[6,5]
Dump-Raw-Memory ::= Dump-Raw-Data{Memory-ID-inst, Dump-Raw-Data-List-inst }
-- instantiate the dump raw memory data instruction list
Dump-Raw-Data-List-inst ::= Dump-Raw-Data-List{max-Dump-Instr-No, Dump-Raw-Data-Instr-inst}
-- the maximum no. of dump instructions
max-Dump-Instr-No INTEGER(1 .. 255) ::= 6
-- instantiate the dump raw memory data instruction
Dump-Raw-Data-Instr-inst ::= Dump-Raw-Data-Instr{Address-inst, Memory-Size-inst}
-- the maximum packet size of the CCSDS space packet protocol
maxCCSDS-packet-size INTEGER(1 .. 4294967296) ::= 65542
-- instantiate the TM[6,6] dumped raw memory data report
TM-6-6 ::= Load-Raw-Data{Memory-ID-inst, Load-Raw-Data-List-inst}
-- instantiate the enable/disable the memory scrubbing
Scrabbing-Memory ::= Scrabbing-Mem {Memory-ID-inst}
-- select a service request
PUS-6 ::= CHOICE {
pus-6-2-load-mem Load-Raw-Memory,
pus-6-5-dump-mem Dump-Raw-Memory,
pus-6-12-abort-dumps Abort-All-Dumps,
pus-6-13-enable-scrubbing Scrabbing-Memory,
pus-6-14-disable-scrubbing Scrabbing-Memory
}
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ST[09] inst
-- taps absolute time
CDS-Spacecraft-Time-inst ::= SEQUENCE {
......@@ -761,6 +957,7 @@ PUS-12 ::= CHOICE {
PUS ::= CHOICE {
device-access PUS-2,
housekeeping PUS-3,
memory-management PUS-6,
time-management PUS-9,
time-scheduling PUS-11,
on-board-monitoring PUS-12,
......@@ -771,97 +968,6 @@ PUS-12 ::= CHOICE {
-- Instantiate the generic TC-type
TC ::= TC-type{APID, SEQ-COUNT, APUserID, PUS}
--*********************************************************
-- Execution reporting data types
Start-Exec-failure-codes ::= ENUMERATED {
noFailure(0),
startExecFailed(1),
hk-def-already-present(2),
hk-def-not-present(3),
hk-def-enabled(4),
hk-param-duplicated(5),
ev-act-list-full(6),
ev-act-def-enabled(7),
ev-act-ID-notFound(8),
sch-act-list-full(9),
sch-act-too-late(10)
}
Progress-Exec-failure-codes ::= ENUMERATED {
noFailure(0),
progresExecFailed(1)
}
Completion-Exec-failure-codes ::= ENUMERATED {
noFailure(0),
completionExecFailed(1)
}
Start-Execution-Notification ::= SEQUENCE {
startExec BOOLEAN,
failureCode Start-Exec-failure-codes,
failureData INTEGER (0..255)
}
Progress-Execution-Notification ::= SEQUENCE {
step InstructionCounter,
progressExec BOOLEAN,
failureCode Progress-Exec-failure-codes,
failureData INTEGER (0..255)
}
Completion-Execution-Notification ::= SEQUENCE {
completionExec BOOLEAN,
failureCode Completion-Exec-failure-codes,
failureData INTEGER (0..255)
}
Request-ID-ACK ::= SEQUENCE{
requestID Request-ID-inst,
ack-successful-completion BOOLEAN,
ack-successful-progress BOOLEAN,
ack-successful-start BOOLEAN
}
--*********************************************************
-- Instantiate the request ID
Request-ID-inst ::= Request-ID {APID, SEQ-COUNT}
-- TM-1-2-failure-codes , ACN manage the "8 bits" constraint
TM-1-2-failure-codes ::= ENUMERATED {
reqIntegrityFailure(0),
serviceNotAvailable(1),
wrongRequestType(2)
}
-- TM-1-10-failure-codes , ACN manage the "8 bits" constraint
TM-1-10-failure-codes ::= ENUMERATED {
reqIntegrityFailure(0),
noDestinationFound(1),
destinationNotReady(2)
}
-- TM-1-2 failure notice data, 8 bits
TM-1-2-failure-data ::= SEQUENCE {
tm-1-2-failure-data-inst INTEGER (0..255)
}
-- TM-1-10 failure notice data, 8 bits
TM-1-10-failure-data ::= SEQUENCE {
tm-1-10-failure-data-inst INTEGER (0..255)
}
Failure-Notice-tm-1-2 ::= Failure-Notice {TM-1-2-failure-codes, TM-1-2-failure-data}
Failure-Notice-tm-1-4 ::= Failure-Notice {Start-Exec-failure-codes, TM-1-10-failure-data}
Failure-Notice-tm-1-6 ::= Failure-Notice {Progress-Exec-failure-codes , TM-1-10-failure-data}
Failure-Notice-tm-1-8 ::= Failure-Notice {Completion-Exec-failure-codes, TM-1-10-failure-data}
Failure-Notice-tm-1-10 ::= Failure-Notice {TM-1-10-failure-codes, TM-1-10-failure-data}
TM-1-1 ::= Request-ID {APID, SEQ-COUNT}
TM-1-2 ::= TM-1-type1 {Request-ID-inst, Failure-Notice-tm-1-2}
TM-1-3 ::= Request-ID {APID, SEQ-COUNT}
TM-1-4 ::= TM-1-type1 {Request-ID-inst, Failure-Notice-tm-1-4}
TM-1-5 ::= SEQUENCE {
req-ID Request-ID {APID, SEQ-COUNT},
step InstructionCounter
}
TM-1-6 ::= SEQUENCE {
req-ID Request-ID {APID, SEQ-COUNT},
step InstructionCounter,
failureNotice Failure-Notice-tm-1-6
}
TM-1-7 ::= Request-ID {APID, SEQ-COUNT}
TM-1-8 ::= TM-1-type1 {Request-ID-inst, Failure-Notice-tm-1-8}
TM-1-10 ::= TM-1-type1 {Request-ID-inst, Failure-Notice-tm-1-10}
-- Instantiate the project list of TM
TMs ::= CHOICE {
......@@ -880,6 +986,7 @@ TMs ::= CHOICE {
tm5-2 TM-5-2,
tm5-3 TM-5-3,
tm5-4 TM-5-4,
tm6-6 TM-6-6,
tm11-13 TM-11-13,
tm12-12 TM-12-12,
tm12-14 TM-12-14
......@@ -1271,6 +1378,39 @@ END
......
DeploymentView.aadl 100644 → 100755
View file @ f273c0c9
......@@ -56,15 +56,21 @@ WITH interfaceview::IV::time_management_st09::time_management;
WITH interfaceview::IV::data_pool;
WITH interfaceview::IV::sc_routing;
WITH interfaceview::IV::event_action_st19::event_action;
WITH interfaceview::IV::event_action_st19::acceptance_st19;
WITH interfaceview::IV::event_action_st19::tm_st19;
WITH interfaceview::IV::event_action_st19::execution_ev_act;
WITH interfaceview::IV::event_action_st19::ev_act_definitions;
WITH interfaceview::IV::event_action_st19::acceptance_st19;
WITH interfaceview::IV::time_sched_st11::time_scheduling;
WITH interfaceview::IV::time_sched_st11::acceptance_st11;
WITH interfaceview::IV::time_sched_st11::tm_st11;
WITH interfaceview::IV::time_sched_st11::execution_time_sched;
WITH interfaceview::IV::time_sched_st11::sched_act_defs;
WITH interfaceview::IV::memory_management_st06::memory_management;
WITH interfaceview::IV::memory_management_st06::acceptance_st06;
WITH interfaceview::IV::memory_management_st06::tm_st06;
WITH interfaceview::IV::memory_management_st06::execution_st06;
WITH interfaceview::IV::memory_management_st06::memory_01;
WITH interfaceview::IV::memory_management_st06::memory_02;
WITH ocarina_processors_x86;
WITH deploymentview::DV::Node1;
WITH Taste;
......@@ -178,9 +184,6 @@ SUBCOMPONENTS
IV_event_action : SYSTEM interfaceview::IV::event_action_st19::event_action::event_action.others {
Taste::FunctionName => "event_action";
};
IV_acceptance_st19 : SYSTEM interfaceview::IV::event_action_st19::acceptance_st19::acceptance_st19.others {
Taste::FunctionName => "acceptance_st19";
};
IV_tm_st19 : SYSTEM interfaceview::IV::event_action_st19::tm_st19::tm_st19.others {
Taste::FunctionName => "tm_st19";
};
......@@ -190,6 +193,9 @@ SUBCOMPONENTS
IV_ev_act_definitions : SYSTEM interfaceview::IV::event_action_st19::ev_act_definitions::ev_act_definitions.others {
Taste::FunctionName => "ev_act_definitions";
};
IV_acceptance_st19 : SYSTEM interfaceview::IV::event_action_st19::acceptance_st19::acceptance_st19.others {
Taste::FunctionName => "acceptance_st19";
};
IV_time_scheduling : SYSTEM interfaceview::IV::time_sched_st11::time_scheduling::time_scheduling.others {
Taste::FunctionName => "time_scheduling";
};
......@@ -205,6 +211,24 @@ SUBCOMPONENTS
IV_sched_act_defs : SYSTEM interfaceview::IV::time_sched_st11::sched_act_defs::sched_act_defs.others {
Taste::FunctionName => "sched_act_defs";
};
IV_memory_management : SYSTEM interfaceview::IV::memory_management_st06::memory_management::memory_management.others {
Taste::FunctionName => "memory_management";
};
IV_acceptance_st06 : SYSTEM interfaceview::IV::memory_management_st06::acceptance_st06::acceptance_st06.others {
Taste::FunctionName => "acceptance_st06";
};
IV_tm_st06 : SYSTEM interfaceview::IV::memory_management_st06::tm_st06::tm_st06.others {
Taste::FunctionName => "tm_st06";
};
IV_execution_st06 : SYSTEM interfaceview::IV::memory_management_st06::execution_st06::execution_st06.others {
Taste::FunctionName => "execution_st06";
};
IV_memory_01 : SYSTEM interfaceview::IV::memory_management_st06::memory_01::memory_01.others {
Taste::FunctionName => "memory_01";
};
IV_memory_02 : SYSTEM interfaceview::IV::memory_management_st06::memory_02::memory_02.others {
Taste::FunctionName => "memory_02";
};
taps : PROCESS deploymentview::DV::Node1::taps.others {
Taste::coordinates => "85474 64572 179410 99940";
Deployment::Port_Number => 0;
......@@ -247,15 +271,21 @@ PROPERTIES
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_data_pool;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_sc_routing;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_event_action;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_acceptance_st19;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_tm_st19;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_execution_ev_act;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_ev_act_definitions;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_acceptance_st19;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_time_scheduling;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_acceptance_st11;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_tm_st11;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_execution_time_sched;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_sched_act_defs;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_memory_management;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_acceptance_st06;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_tm_st06;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_execution_st06;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_memory_01;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_memory_02;
Actual_Processor_Binding => (reference (x86_linux)) APPLIES TO taps;
END Node1.others;
......@@ -274,6 +304,6 @@ PROPERTIES
Taste::coordinates => "0 0 297000 210000";
Taste::version => "2.0";
Taste::interfaceView => "InterfaceView.aadl";
Taste::HWLibraries => ("../../tool-inst/share/ocarina/AADLv2/ocarina_components.aadl");
Taste::HWLibraries => ("/home/taste/tool-inst/share/ocarina/AADLv2/ocarina_components.aadl");
END deploymentview::DV;
InterfaceView.aadl 100644 → 100755
View file @ f273c0c9
This diff is collapsed.
InterfaceView.md5 100644 → 100755
View file @ f273c0c9
bc52ff52b79786b6b19b180855c0db16 InterfaceView.aadl
0689ea10c470c5c024200d228bc0cc08 InterfaceView.aadl
__dv_1_3.aadl 100644 → 100755
View file @ f273c0c9
......@@ -31,6 +31,7 @@ WITH interfaceview::IV::on_board_monitoring_st12;
WITH interfaceview::IV::time_management_st09;
WITH interfaceview::IV::event_action_st19;
WITH interfaceview::IV::time_sched_st11;
WITH interfaceview::IV::memory_management_st06;
WITH ocarina_processors_x86;
WITH deploymentview::DV::Node1;
WITH Taste;
......@@ -144,9 +145,6 @@ SUBCOMPONENTS
IV_event_action : SYSTEM interfaceview::IV::event_action_st19::event_action.others {
Taste::FunctionName => "event_action";
};
IV_acceptance_st19 : SYSTEM interfaceview::IV::event_action_st19::acceptance_st19.others {
Taste::FunctionName => "acceptance_st19";
};
IV_tm_st19 : SYSTEM interfaceview::IV::event_action_st19::tm_st19.others {
Taste::FunctionName => "tm_st19";
};
......@@ -156,6 +154,9 @@ SUBCOMPONENTS
IV_ev_act_definitions : SYSTEM interfaceview::IV::event_action_st19::ev_act_definitions.others {
Taste::FunctionName => "ev_act_definitions";
};
IV_acceptance_st19 : SYSTEM interfaceview::IV::event_action_st19::acceptance_st19.others {
Taste::FunctionName => "acceptance_st19";
};
IV_time_scheduling : SYSTEM interfaceview::IV::time_sched_st11::time_scheduling.others {
Taste::FunctionName => "time_scheduling";
};
......@@ -171,6 +172,24 @@ SUBCOMPONENTS
IV_sched_act_defs : SYSTEM interfaceview::IV::time_sched_st11::sched_act_defs.others {
Taste::FunctionName => "sched_act_defs";
};
IV_memory_management : SYSTEM interfaceview::IV::memory_management_st06::memory_management.others {
Taste::FunctionName => "memory_management";
};
IV_acceptance_st06 : SYSTEM interfaceview::IV::memory_management_st06::acceptance_st06.others {
Taste::FunctionName => "acceptance_st06";
};
IV_tm_st06 : SYSTEM interfaceview::IV::memory_management_st06::tm_st06.others {
Taste::FunctionName => "tm_st06";
};
IV_execution_st06 : SYSTEM interfaceview::IV::memory_management_st06::execution_st06.others {
Taste::FunctionName => "execution_st06";
};
IV_memory_01 : SYSTEM interfaceview::IV::memory_management_st06::memory_01.others {
Taste::FunctionName => "memory_01";
};
IV_memory_02 : SYSTEM interfaceview::IV::memory_management_st06::memory_02.others {
Taste::FunctionName => "memory_02";
};
taps : PROCESS deploymentview::DV::Node1::taps.others {
Taste::coordinates => "85474 64572 179410 99940";
Deployment::Port_Number => 0;
......@@ -213,15 +232,21 @@ PROPERTIES
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_data_pool;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_sc_routing;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_event_action;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_acceptance_st19;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_tm_st19;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_execution_ev_act;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_ev_act_definitions;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_acceptance_st19;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_time_scheduling;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_acceptance_st11;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_tm_st11;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_execution_time_sched;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_sched_act_defs;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_memory_management;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_acceptance_st06;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_tm_st06;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_execution_st06;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_memory_01;
Taste::APLC_Binding => (reference (taps)) APPLIES TO IV_memory_02;
Actual_Processor_Binding => (reference (x86_linux)) APPLIES TO taps;
END Node1.others;
......
__iv_1_3.aadl 100644 → 100755
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acceptance_cpdu1/DataView.pr
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acceptance_cpdu1/DataView.py
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acceptance_cpdu1/acceptance_cpdu1.adb
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acceptance_cpdu1/acceptance_cpdu1.ads
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......@@ -10,6 +10,8 @@ with HK_Service_Structures;
use HK_Service_Structures;
with Event_Reporting_Structures;
use Event_Reporting_Structures;
with Memory_Management_Structures;
use Memory_Management_Structures;
with Time_Management_Structures;
use Time_Management_Structures;
with Time_Based_Sched_Structures;
......@@ -34,10 +36,10 @@ use adaasn1rtl;
package acceptance_cpdu1 is
-- Provided interface "tc_payload"
procedure tc_payload(tc: access asn1SccTC);
pragma Export(C, tc_payload, "acceptance_cpdu1_tc_payload");
pragma Export(C, tc_payload, "acceptance_cpdu1_PI_tc_payload");
-- Provided interface "test_Payload"
procedure test_Payload(testPayload: access asn1SccTest_Taps_Parameters);
pragma Export(C, test_Payload, "acceptance_cpdu1_test_Payload");
pragma Export(C, test_payload, "acceptance_cpdu1_PI_test_payload");
-- Required interface "tc24"
procedure RItc24(tc2_4: access asn1SccDistribute_CPDU_Cmds);
pragma import(C, RItc24, "acceptance_cpdu1_RI_tc24");
......
acceptance_cpdu1/dataview-uniq.asn
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acceptance_cpdu1/iv.py
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acceptance_hk/DataView.pr
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acceptance_hk/DataView.py
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acceptance_hk/acceptance_hk.adb
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acceptance_hk/acceptance_hk.ads
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......@@ -10,6 +10,8 @@ with HK_Service_Structures;
use HK_Service_Structures;
with Event_Reporting_Structures;
use Event_Reporting_Structures;
with Memory_Management_Structures;
use Memory_Management_Structures;
with Time_Management_Structures;
use Time_Management_Structures;
with Time_Based_Sched_Structures;
......@@ -34,7 +36,7 @@ use adaasn1rtl;
package acceptance_hk is
-- Provided interface "tc_hk"
procedure tc_hk(TC: access asn1SccTC);
pragma Export(C, tc_hk, "acceptance_hk_tc_hk");
pragma Export(C, tc_hk, "acceptance_hk_PI_tc_hk");
-- Required interface "ready_hk"
procedure RIready_hk(readyHK: access asn1SccMyBool);
pragma import(C, RIready_hk, "acceptance_hk_RI_ready_hk");
......
acceptance_hk/dataview-uniq.asn
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