DVE: Create HW model
A QAbstractListModel containing all HW (processor, drivers, buses).
Load from disc (configuration for the directory).
- Conversion tool from Maxime
- Example data set from Maxime
Add file watcher to update data on disk changes
- Layout (tree/groups) in view? -> all in one file (AADL), all next to each other.
There should be an XML model listing "Boards" so that when you create a Node in the deployment view you instantiate a Board Roughly: Board components have a name and can inherit from another board E.g. name = "x86.linux" An attribute of the board shall be named "Execution_Platform" and have an enumerated type value (use "Native" to start) (There are other attributes that I will define later)
Then boards a have a number of I/O ports I/O ports have a name and a type ("x86.eth0" inherits from "x86.ip") I/O ports have a type name (ASN.1 Type name), a module name (ASN.1 Module name) and a pointer to the ASN.1 file name that contains it
This is how it looks like in the source AADL file (ocarina_components.aadl)
Io ports ,must have a property that specifies the Bus they can connect to ("Requires_Bus_Access") and the values should be a list of strings (to be provided by me) such as "ocarina_buses::ip.i"
You should use this value to allow/forbid connection between 2 I/O ports
Actually it is a bit simpler: you don't need "Execution_Plaform" and the name should be a user-frendly string :
On a system without IO connections the objective is to be able to generate this, using the grantlee template:
There are the functions of the Interface view that are bounded to the Board (the board is "x86_linux : PROCESSOR ...")