Commits (4)
---------------------------------------------------
-- AADL2.2
-- TASTE type interfaceview
--
-- generated code: do not edit
---------------------------------------------------
PACKAGE interfaceview::IV::Calling
PUBLIC
WITH interfaceview::IV::Gnc;
WITH interfaceview::IV::fpga_reconfiguration_engine;
WITH interfaceview::IV::Gnc2;
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
SUBPROGRAM PI_pulse
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_pulse;
SUBPROGRAM IMPLEMENTATION PI_pulse.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_pulse.others;
SUBPROGRAM PI_changeMode
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_changeMode;
SUBPROGRAM IMPLEMENTATION PI_changeMode.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_changeMode.others;
SUBPROGRAM RI_do_something
FEATURES
inp1 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp2 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp3 : IN PARAMETER DataView::Seq4 {
Taste::encoding => NATIVE;
};
outpu : OUT PARAMETER DataView::Seqout {
Taste::encoding => NATIVE;
};
innested : IN PARAMETER DataView::In_Nested {
Taste::encoding => NATIVE;
};
outnested : OUT PARAMETER DataView::Out_Nested {
Taste::encoding => NATIVE;
};
END RI_do_something;
SUBPROGRAM IMPLEMENTATION RI_do_something.others
END RI_do_something.others;
SUBPROGRAM RI_init
END RI_init;
SUBPROGRAM IMPLEMENTATION RI_init.others
END RI_init.others;
SUBPROGRAM RI_run
FEATURES
spi_address : IN PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
size : IN PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
END RI_run;
SUBPROGRAM IMPLEMENTATION RI_run.others
END RI_run.others;
SUBPROGRAM RI_status
FEATURES
fpga_status : OUT PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
END RI_status;
SUBPROGRAM IMPLEMENTATION RI_status.others
END RI_status.others;
SUBPROGRAM RI_do_something2
FEATURES
inp1 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp2 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp3 : IN PARAMETER DataView::Seq4 {
Taste::encoding => NATIVE;
};
outpu : OUT PARAMETER DataView::Seqout {
Taste::encoding => NATIVE;
};
innested : IN PARAMETER DataView::In_Nested {
Taste::encoding => NATIVE;
};
outnested : OUT PARAMETER DataView::Out_Nested {
Taste::encoding => NATIVE;
};
END RI_do_something2;
SUBPROGRAM IMPLEMENTATION RI_do_something2.others
END RI_do_something2.others;
SYSTEM Calling
FEATURES
PI_pulse : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::Calling::PI_pulse.others {
Taste::coordinates => "100509 56233";
Taste::RCMoperationKind => cyclic;
Taste::RCMperiod => 1000 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "pulse";
};
PI_changeMode : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::Calling::PI_changeMode.others {
Taste::coordinates => "111658 56233";
Taste::RCMoperationKind => cyclic;
Taste::RCMperiod => 20000 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "changeMode";
};
RI_do_something : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::Gnc::PI_do_something.others {
Taste::coordinates => "134118 68838";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "do_something";
Taste::labelInheritance => "true";
};
RI_init : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_init.others {
Taste::coordinates => "108721 94530";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "init";
Taste::labelInheritance => "true";
};
RI_run : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_run.others {
Taste::coordinates => "125534 94530";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "run";
Taste::labelInheritance => "true";
};
RI_status : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_status.others {
Taste::coordinates => "97597 94530";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "status";
Taste::labelInheritance => "true";
};
RI_do_something2 : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::Gnc2::PI_do_something2.others {
Taste::coordinates => "134118 75133";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "do_something2";
Taste::labelInheritance => "true";
};
PROPERTIES
Source_Language => (C);
Taste::Active_Interfaces => any;
END Calling;
SYSTEM IMPLEMENTATION Calling.others
END Calling.others;
END interfaceview::IV::Calling;
PACKAGE interfaceview::IV::Gnc
PUBLIC
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
SUBPROGRAM PI_do_something
FEATURES
inp1 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp2 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp3 : IN PARAMETER DataView::Seq4 {
Taste::encoding => NATIVE;
};
outpu : OUT PARAMETER DataView::Seqout {
Taste::encoding => NATIVE;
};
innested : IN PARAMETER DataView::In_Nested {
Taste::encoding => NATIVE;
};
outnested : OUT PARAMETER DataView::Out_Nested {
Taste::encoding => NATIVE;
};
END PI_do_something;
SUBPROGRAM IMPLEMENTATION PI_do_something.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_do_something.others;
SYSTEM Gnc
FEATURES
PI_do_something : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::Gnc::PI_do_something.others {
Taste::coordinates => "174484 81134";
Taste::RCMoperationKind => unprotected;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "do_something";
};
PROPERTIES
Source_Language => (Simulink);
Taste::Active_Interfaces => any;
END Gnc;
SYSTEM IMPLEMENTATION Gnc.others
END Gnc.others;
END interfaceview::IV::Gnc;
PACKAGE interfaceview::IV::fpga_reconfiguration_engine
PUBLIC
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
SUBPROGRAM PI_init
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_init;
SUBPROGRAM IMPLEMENTATION PI_init.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_init.others;
SUBPROGRAM PI_run
FEATURES
spi_address : IN PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
size : IN PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_run;
SUBPROGRAM IMPLEMENTATION PI_run.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_run.others;
SUBPROGRAM PI_status
FEATURES
fpga_status : OUT PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_status;
SUBPROGRAM IMPLEMENTATION PI_status.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_status.others;
SYSTEM fpga_reconfiguration_engine
FEATURES
PI_init : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_init.others {
Taste::coordinates => "120167 113227";
Taste::RCMoperationKind => unprotected;
Taste::RCMperiod => 0 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "init";
};
PI_run : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_run.others {
Taste::coordinates => "135308 113227";
Taste::RCMoperationKind => unprotected;
Taste::RCMperiod => 0 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "run";
};
PI_status : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_status.others {
Taste::coordinates => "99407 113227";
Taste::RCMoperationKind => unprotected;
Taste::RCMperiod => 0 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "status";
};
PROPERTIES
Source_Language => (C);
Taste::Active_Interfaces => any;
END fpga_reconfiguration_engine;
SYSTEM IMPLEMENTATION fpga_reconfiguration_engine.others
SUBCOMPONENTS
flagToLinkWith : DATA DataView::Taste_directive {
Taste::FS_Default_Value => "linker-option:""-L$PRJ_FOLDER/external_libs/lib -lmdw""";
};
flagsToCompileWith : DATA DataView::Taste_directive {
Taste::FS_Default_Value => "compiler-option:""-I$PRJ_FOLDER/external_libs/inc""";
};
END fpga_reconfiguration_engine.others;
END interfaceview::IV::fpga_reconfiguration_engine;
PACKAGE interfaceview::IV::Gnc2
PUBLIC
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
SUBPROGRAM PI_do_something2
FEATURES
inp1 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp2 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp3 : IN PARAMETER DataView::Seq4 {
Taste::encoding => NATIVE;
};
outpu : OUT PARAMETER DataView::Seqout {
Taste::encoding => NATIVE;
};
innested : IN PARAMETER DataView::In_Nested {
Taste::encoding => NATIVE;
};
outnested : OUT PARAMETER DataView::Out_Nested {
Taste::encoding => NATIVE;
};
END PI_do_something2;
SUBPROGRAM IMPLEMENTATION PI_do_something2.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_do_something2.others;
SYSTEM Gnc2
FEATURES
PI_do_something2 : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::Gnc2::PI_do_something2.others {
Taste::coordinates => "172121 115903";
Taste::RCMoperationKind => unprotected;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "do_something2";
};
PROPERTIES
Source_Language => (Simulink);
Taste::Active_Interfaces => any;
END Gnc2;
SYSTEM IMPLEMENTATION Gnc2.others
END Gnc2.others;
END interfaceview::IV::Gnc2;
PACKAGE interfaceview::IV
PUBLIC
WITH interfaceview::IV::Calling;
WITH interfaceview::IV::Gnc;
WITH interfaceview::IV::fpga_reconfiguration_engine;
WITH interfaceview::IV::Gnc2;
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
SYSTEM interfaceview
PROPERTIES
Taste::dataView => ("DataView");
Taste::dataViewPath => ("DataView.aadl");
END interfaceview;
SYSTEM IMPLEMENTATION interfaceview.others
SUBCOMPONENTS
Calling : SYSTEM interfaceview::IV::Calling::Calling.others {
Taste::coordinates => "84026 56233 134118 94530";
};
Gnc : SYSTEM interfaceview::IV::Gnc::Gnc.others {
Taste::coordinates => "174484 61582 236049 102141";
TASTE_IV_Properties::FPGA_Configurations => "modeA,modeB";
};
fpga_reconfiguration_engine : SYSTEM interfaceview::IV::fpga_reconfiguration_engine::fpga_reconfiguration_engine.others {
Taste::coordinates => "90205 113227 140857 136625";
};
Gnc2 : SYSTEM interfaceview::IV::Gnc2::Gnc2.others {
Taste::coordinates => "172121 106297 232592 141099";
TASTE_IV_Properties::FPGA_Configurations => "modeC";
};
CONNECTIONS
Gnc_PI_do_something_Calling_RI_do_something : SUBPROGRAM ACCESS Gnc.PI_do_something -> Calling.RI_do_something {
Taste::coordinates => "134118 68838 156256 68838 156256 81134 174484 81134";
};
fpga_reconfiguration_engine_PI_init_Calling_RI_init : SUBPROGRAM ACCESS fpga_reconfiguration_engine.PI_init -> Calling.RI_init {
Taste::coordinates => "108721 94530 108721 103878 120167 103878 120167 113227";
};
fpga_reconfiguration_engine_PI_run_Calling_RI_run : SUBPROGRAM ACCESS fpga_reconfiguration_engine.PI_run -> Calling.RI_run {
Taste::coordinates => "125534 94530 125534 103878 135308 103878 135308 113227";
};
fpga_reconfiguration_engine_PI_status_Calling_RI_status : SUBPROGRAM ACCESS fpga_reconfiguration_engine.PI_status -> Calling.RI_status {
Taste::coordinates => "97597 94530 97597 103878 99407 103878 99407 113227";
};
Gnc2_PI_do_something2_Calling_RI_do_something2 : SUBPROGRAM ACCESS Gnc2.PI_do_something2 -> Calling.RI_do_something2 {
Taste::coordinates => "134118 75133 153119 75133 153119 115903 172121 115903";
};
END interfaceview.others;
PROPERTIES
Taste::dataView => ("DataView");
Taste::dataViewPath => ("DataView.aadl");
Taste::coordinates => "0 0 297000 210000";
Taste::version => "2.3";
END interfaceview::IV;
KAZOO?=kazoo
# Here you can specify folders containing external code you want to
# compile and link for a specific partition.
# Use upper case for the partition name:
# export <PARTITION_NAME>_EXTERNAL_SOURCE_PATH=/absolute/path/1:/....
all: c
c: work/glue_built
cp -r calling/* work/calling/C/src
cp -r gnc/* work/gnc/SIMULINK/src
cp -r gnc2/* work/gnc2/SIMULINK/src
cp -r fpga_reconfiguration_engine/* work/fpga_reconfiguration_engine/C/src
$(MAKE) -C work
skeletons:
$(MAKE) work/skeletons_built
cp calling/*.c work/calling/C/src
cp calling/*.h work/calling/C/src
cp gnc/*.c work/gnc/SIMULINK/src
cp gnc/*.h work/gnc/SIMULINK/src
cp gnc2/*.c work/gnc2/SIMULINK/src
cp gnc2/*.h work/gnc2/SIMULINK/src
cp fpga_reconfiguration_engine/*.c work/fpga_reconfiguration_engine/C/src
cp fpga_reconfiguration_engine/*.h work/fpga_reconfiguration_engine/C/src
work/skeletons_built: InterfaceView.aadl DataView.aadl
$(KAZOO) --gw -o work
$(MAKE) -C work dataview
touch $@
work/glue_built: InterfaceView.aadl DeploymentView.aadl DataView.aadl
$(KAZOO) -p --glue --gw -o work
touch $@
clean:
rm -rf work/build
rm -f work/glue_built work/skeletons_built
find work -type d -name "wrappers" -exec rm -rf {} +
find work -type d -name "*_GUI" -exec rm -rf {} +
.PHONY: clean skeletons c
/* User code: This file will not be overwritten by TASTE. */
#include "calling.h"
#include <string.h>
#include <stdio.h>
//#include "bravebitfiles.h"
char p_szGlobalState[10] = "modeX";
#define FPGA_READY "ready"
#define FPGA_RECONFIGURING "reconfiguring"
#define FPGA_ERROR "error"
#define FPGA_DISABLED "disabled"
// For each HWSW Function Block a global variable must be created with name "globalFpgaStatus_<Function Block's name>".
// This variable will host at any time the current HW status associated with the respective Function Block.
// This status shall be updated by the HW reconfiguration manager commanding of the FPGA and FPGA status check,
// and can be one of: FPGA_READY, FPGA_RECONFIGURING, FPGA_ERROR, FPGA_DISABLED.
// Status is kept per Function Block and not for the full FPGA, to accommodate for future work on partial reconfiguration of the HW accelerator.
char globalFpgaStatus_gnc[20] = FPGA_DISABLED;
char globalFpgaStatus_gnc2[20] = FPGA_DISABLED;
//uncomment the following define to print debug level info
//#define DEBUG_RECONF
int get_bitfile_info(char *config, char **global_status_var, asn1SccMyInteger *offset, asn1SccMyInteger *size)
{
/* int headerfile_entries = 0;
headerfile_entries = sizeof(bitfiles)/sizeof(struct config_bitfile);
#ifdef DEBUG_RECONF
printf("[get_bitfile_info] There are %d headerfile entries.\n", headerfile_entries);
#endif
for(int i = 0; i < headerfile_entries; i++){
#ifdef DEBUG_RECONF
printf("[get_bitfile_info] Mode index %d is %s\n", i, bitfiles[i].config);
#endif
if (strcmp(config, bitfiles[i].config) == 0) {
#ifdef DEBUG_RECONF
printf("[get_bitfile_info] Mode found in index %d which is %s\n", i, bitfiles[i].config);
#endif
*global_status_var = bitfiles[i].global_status_var;
*offset = bitfiles[i].offset;
*size = bitfiles[i].size;
return 0;
}
}*/
return 1;
}
void calling_startup()
{
/* Write your initialization code here,
but do not make any call to a required interface. */
printf("\n[calling_startup] Starting up ...\n");
/* ## FPGA reconfiguration engine init */
calling_RI_init();
}
void calling_PI_changeMode()
{
/* Write your code here! */
// printf("\n[calling_PI_changeMode] Current mode is %s\n", p_szGlobalState);
/* FPGA reconfiguration engine part */
static asn1SccMyInteger fpga_status = 1;
static asn1SccMyInteger offset = -1;
static asn1SccMyInteger size = -1;
char new_config[10] = "";
if (strcmp(p_szGlobalState, "modeX") == 0) {
strcpy(new_config, "modeA");
}else{
if (strcmp(p_szGlobalState, "modeA") == 0) {
strcpy(new_config, "modeC");
}else{
strcpy(new_config, "modeX");
}
}
printf("[calling_PI_changeMode] Initiating mode change %s => %s ... \n", p_szGlobalState, new_config);
// ! header file is under binary.c/auto-src
// use it to map mode to bit stream offset and size that engine needs
// update global variables to value FPGA_RECONFIGURING
// see calling.c where global variable is defined (and its values): here is globalFpgaStatus_gnc
// do not hardcode: rule here is the variables will always be named 'globalFpgaStatus_' + hw funcion block name (in this case 'gnc')
// the hw funcion block name (in this case 'gnc') which corresponds to the mode can also be retrieved from the header file
// this variable should be updated so that applications know if function is still operational in the FPGA
char *global_status_var;
offset = -1;
size = -1;
if (!get_bitfile_info(new_config, &global_status_var, &offset, &size)){
/*#ifdef DEBUG_RECONF
printf("[calling_PI_changeMode] bitfile info is: global_status_var prev - %s, offset - %lld, size - %lld\n", global_status_var, offset, size);
#endif
// DISABLE ALL
strcpy(globalFpgaStatus_gnc, FPGA_DISABLED);
strcpy(globalFpgaStatus_gnc2, FPGA_DISABLED);
// SET NEXT AS RECONFIGURING
strcpy(global_status_var, FPGA_RECONFIGURING);
#ifdef DEBUG_RECONF
printf("[calling_PI_changeMode] global_status_var now is - %s\n", global_status_var);
printf("[calling_PI_changeMode] cross check: globalFpgaStatus_gnc now is - %s\n", globalFpgaStatus_gnc);
printf("[calling_PI_changeMode] cross check: globalFpgaStatus_gnc2 now is - %s\n", globalFpgaStatus_gnc2);
#endif
// CALL engine
// ## FPGA reconfiguration engine status
calling_RI_status(&fpga_status);
#ifdef DEBUG_RECONF
printf("[calling_PI_changeMode] FPGA STATUS before reconf = %lld\n", fpga_status);
#endif
// ## FPGA reconfiguration engine configuration
calling_RI_run(&offset, &size);
// ## FPGA reconfiguration engine status
calling_RI_status(&fpga_status);
#ifdef DEBUG_RECONF
printf("[calling_PI_changeMode] FPGA STATUS after reconf = %lld\n", fpga_status);
#endif
// update again global variables to new value depending on the FPGA state: FPGA_READY? FPGA_ERROR?
if (!fpga_status){
strcpy(global_status_var, FPGA_READY);
printf("[calling_PI_changeMode] New config loaded with success.\n");
strcpy(p_szGlobalState, new_config);
//printf("[calling_PI_changeMode] NEW mode is %s\n", p_szGlobalState);
}else{
strcpy(global_status_var, FPGA_ERROR);
printf("[calling_PI_changeMode] New config could not be loaded!\n");
printf("[calling_PI_changeMode] STAY in mode %s\n", p_szGlobalState);
}
*/ }else{
printf("[calling_PI_changeMode] New (HW) config not found... SW mode applies.\n");
strcpy(p_szGlobalState, new_config);
//printf("[calling_PI_changeMode] NEW mode is %s\n", p_szGlobalState);
}
}
void calling_PI_pulse()
{
printf("\n[calling_PI_pulse] Current mode is %s\n", p_szGlobalState);
static asn1SccSeq3 in1 = {0,0,0};
static asn1SccSeq3 in2 = {1,1,1};
static asn1SccSeq4 in3 = {2,2,2,2};
static asn1SccIn_Nested inn = {{3,3,3,3}, {4,4,4}};
asn1SccSeqout out1 = {0,0,0,0,0,0,0,0};
asn1SccOut_Nested outn = {{0,0,0,0,0,0,0}};
if (strcmp(p_szGlobalState, "modeC") == 0) {
printf("[calling_PI_pulse] Calling 'do_something2'\n");
calling_RI_do_something2(&in1, &in2, &in3, &inn, &out1, &outn);
}else{
printf("[calling_PI_pulse] Calling 'do_something'\n");
calling_RI_do_something(&in1, &in2, &in3, &inn, &out1, &outn);
}
printf("[calling_PI_pulse] Sent: %lld %lld %lld\n", in1.arr[0], in1.arr[1], in1.arr[2]);
printf("[calling_PI_pulse] Sent: %lld %lld %lld\n", in2.arr[0], in2.arr[1], in2.arr[2]);
printf("[calling_PI_pulse] Sent: %lld %lld %lld %lld\n", in3.arr[0], in3.arr[1], in3.arr[2], in3.arr[3]);
printf("[calling_PI_pulse] Sent: {%lld %lld %lld %lld - %lld %lld %lld}\n\n", inn.inest_a.arr[0], inn.inest_a.arr[1], inn.inest_a.arr[2], inn.inest_a.arr[3], inn.inest_b.arr[0], inn.inest_b.arr[1], inn.inest_b.arr[2]);
printf("[calling_PI_pulse] Received: %lld %lld %lld %lld %lld %lld %lld %lld\n", out1.arr[0], out1.arr[1], out1.arr[2], out1.arr[3], out1.arr[4], out1.arr[5], out1.arr[6], out1.arr[7]);
printf("[calling_PI_pulse] Received: {%lld %lld %lld %lld %lld %lld %lld}\n", outn.onest_a.arr[0], outn.onest_a.arr[1], outn.onest_a.arr[2], outn.onest_a.arr[3], outn.onest_a.arr[4], outn.onest_a.arr[5], outn.onest_a.arr[6]);
in1.arr[0]++; in1.arr[1]++; in1.arr[2]++;
in2.arr[0]++; in2.arr[1]++; in2.arr[2]++;
in3.arr[0]++; in3.arr[1]++; in3.arr[2]++; in3.arr[3]++;
inn.inest_a.arr[0]++; inn.inest_a.arr[1]++; inn.inest_a.arr[2]++; inn.inest_a.arr[3]++; inn.inest_b.arr[0]++; inn.inest_b.arr[1]++; inn.inest_b.arr[2]++;
}
/* This file was generated automatically: DO NOT MODIFY IT ! */
/* Declaration of the functions that have to be provided by the user */
#ifndef __USER_CODE_H_calling__
#define __USER_CODE_H_calling__
#include "C_ASN1_Types.h"
#ifdef __cplusplus
extern "C" {
#endif
void calling_startup();
void calling_PI_pulse();
void calling_PI_changeMode();
extern void calling_RI_do_something(const asn1SccSeq3 *,
const asn1SccSeq3 *,
const asn1SccSeq4 *,
const asn1SccIn_Nested *,
asn1SccSeqout *,
asn1SccOut_Nested *);
extern void calling_RI_init();
extern void calling_RI_run(const asn1SccMyInteger *,
const asn1SccMyInteger *);
extern void calling_RI_status(asn1SccMyInteger *);
extern void calling_RI_do_something2(const asn1SccSeq3 *,
const asn1SccSeq3 *,
const asn1SccSeq4 *,
const asn1SccIn_Nested *,
asn1SccSeqout *,
asn1SccOut_Nested *);
#ifdef __cplusplus
}
#endif
#endif
/* User code: This file will not be overwritten by TASTE. */
#include <assert.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <inttypes.h>
#include <unistd.h>
#include <sched.h>
/*===============================================
* IMPLEMENTED INTERFACES
*===============================================*/
#include "fpga_reconfiguration_engine.h"
/*===============================================
* USED INTERFACES
*===============================================*/
//#include "fpga_cfg.h"
/*===============================================
* PRIVATE DEFINED CONSTANT #define
*===============================================*/
#ifndef NELEM
#define NELEM(a) (sizeof (a) / sizeof (a[0]))
#endif
/*===============================================
* STATIC GLOBAL VARIABLES
*===============================================*/
/*===============================================
* STATIC FUNCTIONS DECLARARION
*===============================================*/
/*===============================================
* IMPLEMENTED FUNCTIONS
*===============================================*/
void fpga_reconfiguration_engine_startup()
{
//fpga_cfg_init(0, 1);
}
void fpga_reconfiguration_engine_PI_status(asn1SccMyInteger *status)
{
*status = fpga_cfg_get_status();
}
void fpga_reconfiguration_engine_PI_run(const asn1SccMyInteger *IN_spi_address,
const asn1SccMyInteger *IN_size)
{
int RAM_address = 0x08000000;
/* Reset configuration engine */
fpga_cfg_reset();
/* Loading bitfile in RAM memory */
if (fpga_cfg_cpy_bitstream (*IN_spi_address, RAM_address, *IN_size))
{
printf ("fpga_reconfiguration_engine_PI_run: Failed to load bitfile in RAM memory\n");
}
/* Reconfigure FPGA */
fpga_cfg_config(RAM_address, (int)*IN_size);
}
void fpga_reconfiguration_engine_PI_init()
{
// fpga_cfg_init(0, 1);
}
/* This file was generated automatically: DO NOT MODIFY IT ! */
/* Declaration of the functions that have to be provided by the user */
#ifndef __USER_CODE_H_fpga_reconfiguration_engine__
#define __USER_CODE_H_fpga_reconfiguration_engine__
#include "C_ASN1_Types.h"
#ifdef __cplusplus
extern "C" {
#endif
void fpga_reconfiguration_engine_startup();
void fpga_reconfiguration_engine_PI_init();
void fpga_reconfiguration_engine_PI_run(const asn1SccMyInteger *,
const asn1SccMyInteger *);
void fpga_reconfiguration_engine_PI_status(asn1SccMyInteger *);
#ifdef __cplusplus
}
#endif
#endif
MyInteger = Simulink.AliasType;
MyInteger.BaseType = 'int32';
MyInteger.Description = 'range is (-411673351, 763937697)';
T_Int32 = Simulink.AliasType;
T_Int32.BaseType = 'int32';
T_Int32.Description = 'range is (-2147483648, 2147483647)';
In_Nested_inest_a_member_data=Simulink.BusElement;
In_Nested_inest_a_member_data.name='element_data';
In_Nested_inest_a_member_data.DataType='int32';
In_Nested_inest_a_member_data.dimensions=4;
In_Nested_inest_a=Simulink.Bus;
In_Nested_inest_a.Elements = [In_Nested_inest_a_member_data ];
Seq4_member_data=Simulink.BusElement;
Seq4_member_data.name='element_data';
Seq4_member_data.DataType='int32';
Seq4_member_data.dimensions=4;
Seq4=Simulink.Bus;
Seq4.Elements = [Seq4_member_data ];
Seq3_member_data=Simulink.BusElement;
Seq3_member_data.name='element_data';
Seq3_member_data.DataType='int32';
Seq3_member_data.dimensions=3;
Seq3=Simulink.Bus;
Seq3.Elements = [Seq3_member_data ];
T_Int8 = Simulink.AliasType;
T_Int8.BaseType = 'int8';
T_Int8.Description = 'range is (-128, 127)';
In_Nested_inest_b_member_data=Simulink.BusElement;
In_Nested_inest_b_member_data.name='element_data';
In_Nested_inest_b_member_data.DataType='int32';
In_Nested_inest_b_member_data.dimensions=3;
In_Nested_inest_b=Simulink.Bus;
In_Nested_inest_b.Elements = [In_Nested_inest_b_member_data ];
In_Nested_elem01=Simulink.BusElement;
In_Nested_elem01.name='inest_a';
In_Nested_elem01.DataType='In_Nested_inest_a';
In_Nested_elem01.dimensions=1;
In_Nested_elem02=Simulink.BusElement;
In_Nested_elem02.name='inest_b';
In_Nested_elem02.DataType='In_Nested_inest_b';
In_Nested_elem02.dimensions=1;
In_Nested = Simulink.Bus;
In_Nested.Elements = [In_Nested_elem01 In_Nested_elem02 ];
Out_Nested_onest_a_member_data=Simulink.BusElement;
Out_Nested_onest_a_member_data.name='element_data';
Out_Nested_onest_a_member_data.DataType='int32';
Out_Nested_onest_a_member_data.dimensions=7;
Out_Nested_onest_a=Simulink.Bus;
Out_Nested_onest_a.Elements = [Out_Nested_onest_a_member_data ];
TASTE_Boolean = Simulink.AliasType;
TASTE_Boolean.BaseType = 'boolean';
TASTE_Boolean.Description = 'A simple BOOLEAN';
T_Boolean = Simulink.AliasType;
T_Boolean.BaseType = 'boolean';
T_Boolean.Description = 'A simple BOOLEAN';
T_UInt8 = Simulink.AliasType;
T_UInt8.BaseType = 'uint8';
T_UInt8.Description = 'range is (0, 255)';
T_UInt32 = Simulink.AliasType;
T_UInt32.BaseType = 'uint32';
T_UInt32.Description = 'range is (0, 4294967295)';
Out_Nested_elem01=Simulink.BusElement;
Out_Nested_elem01.name='onest_a';
Out_Nested_elem01.DataType='Out_Nested_onest_a';
Out_Nested_elem01.dimensions=1;
Out_Nested = Simulink.Bus;
Out_Nested.Elements = Out_Nested_elem01 ;
Seqout_member_data=Simulink.BusElement;
Seqout_member_data.name='element_data';
Seqout_member_data.DataType='int32';
Seqout_member_data.dimensions=8;
Seqout=Simulink.Bus;
Seqout.Elements = [Seqout_member_data ];
/*
* File: do_something.c
*
* Code generated for Simulink model 'do_something'.
*
* Model version : 1.2
* Simulink Coder version : 8.12 (R2017a) 16-Feb-2017
* C/C++ source code generated on : Thu Jan 31 17:24:34 2019
*
* Target selection: ert.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#include "do_something.h"
#include "do_something_private.h"
/* External inputs (root inport signals with auto storage) */
ExtU_do_something_T do_something_U;
/* External outputs (root outports fed by signals with auto storage) */
ExtY_do_something_T do_something_Y;
/* Real-time model */
RT_MODEL_do_something_T do_something_M_;
RT_MODEL_do_something_T *const do_something_M = &do_something_M_;
/* Model step function */
void do_something_step(void)
{
int32_T rtb_Sum2;
int32_T rtb_Sum2_idx_0;
int32_T rtb_Sum2_idx_1;
int32_T rtb_Sum2_idx_2;
/* Sum: '<Root>/Sum2' incorporates:
* Gain: '<Root>/Gain2'
* Inport: '<Root>/innested'
* Inport: '<Root>/inp3'
*/
rtb_Sum2 = 5 * do_something_U.inp3.element_data[0] +
do_something_U.innested.inest_a.element_data[0];
/* Outport: '<Root>/outpu' incorporates:
* Inport: '<Root>/inp3'
* SignalConversion: '<Root>/TmpSignal ConversionAtoutpu_Seqout_BusCreInport1'
*/
do_something_Y.outpu.element_data[0] = do_something_U.inp3.element_data[0];
do_something_Y.outpu.element_data[4] = rtb_Sum2;
/* Sum: '<Root>/Sum2' incorporates:
* Gain: '<Root>/Gain2'
* Inport: '<Root>/innested'
* Inport: '<Root>/inp3'
*/
rtb_Sum2_idx_0 = rtb_Sum2;
rtb_Sum2 = 5 * do_something_U.inp3.element_data[1] +
do_something_U.innested.inest_a.element_data[1];
/* Outport: '<Root>/outpu' incorporates:
* Inport: '<Root>/inp3'
* SignalConversion: '<Root>/TmpSignal ConversionAtoutpu_Seqout_BusCreInport1'
*/
do_something_Y.outpu.element_data[1] = do_something_U.inp3.element_data[1];
do_something_Y.outpu.element_data[5] = rtb_Sum2;
/* Sum: '<Root>/Sum2' incorporates:
* Gain: '<Root>/Gain2'
* Inport: '<Root>/innested'
* Inport: '<Root>/inp3'
*/
rtb_Sum2_idx_1 = rtb_Sum2;
rtb_Sum2 = 5 * do_something_U.inp3.element_data[2] +
do_something_U.innested.inest_a.element_data[2];
/* Outport: '<Root>/outpu' incorporates:
* Inport: '<Root>/inp3'
* SignalConversion: '<Root>/TmpSignal ConversionAtoutpu_Seqout_BusCreInport1'
*/
do_something_Y.outpu.element_data[2] = do_something_U.inp3.element_data[2];
do_something_Y.outpu.element_data[6] = rtb_Sum2;
/* Sum: '<Root>/Sum2' incorporates:
* Gain: '<Root>/Gain2'
* Inport: '<Root>/innested'
* Inport: '<Root>/inp3'
*/
rtb_Sum2_idx_2 = rtb_Sum2;
rtb_Sum2 = 5 * do_something_U.inp3.element_data[3] +
do_something_U.innested.inest_a.element_data[3];
/* Outport: '<Root>/outpu' incorporates:
* Inport: '<Root>/inp3'
* SignalConversion: '<Root>/TmpSignal ConversionAtoutpu_Seqout_BusCreInport1'
*/
do_something_Y.outpu.element_data[3] = do_something_U.inp3.element_data[3];
do_something_Y.outpu.element_data[7] = rtb_Sum2;
/* Outport: '<Root>/outnested' incorporates:
* Gain: '<Root>/Gain'
* Gain: '<Root>/Gain1'
* Inport: '<Root>/innested'
* Inport: '<Root>/inp1'
* Inport: '<Root>/inp2'
* SignalConversion: '<Root>/TmpSignal ConversionAtoutpu_Seqout_BusCre1Inport1'
* Sum: '<Root>/Sum'
* Sum: '<Root>/Sum1'
*/
do_something_Y.outnested.onest_a.element_data[0] = (6 *
do_something_U.inp1.element_data[0] + do_something_U.inp2.element_data[0]) +
3 * do_something_U.innested.inest_b.element_data[0];
do_something_Y.outnested.onest_a.element_data[1] = (6 *
do_something_U.inp1.element_data[1] + do_something_U.inp2.element_data[1]) +
3 * do_something_U.innested.inest_b.element_data[1];
do_something_Y.outnested.onest_a.element_data[2] = (6 *
do_something_U.inp1.element_data[2] + do_something_U.inp2.element_data[2]) +
3 * do_something_U.innested.inest_b.element_data[2];
do_something_Y.outnested.onest_a.element_data[3] = rtb_Sum2_idx_0;
do_something_Y.outnested.onest_a.element_data[4] = rtb_Sum2_idx_1;
do_something_Y.outnested.onest_a.element_data[5] = rtb_Sum2_idx_2;
do_something_Y.outnested.onest_a.element_data[6] = rtb_Sum2;
}
/* Model initialize function */
void do_something_initialize(void)
{
/* Registration code */
/* initialize error status */
rtmSetErrorStatus(do_something_M, (NULL));
/* external inputs */
(void)memset((void *)&do_something_U, 0, sizeof(ExtU_do_something_T));
/* external outputs */
(void) memset((void *)&do_something_Y, 0,
sizeof(ExtY_do_something_T));
}
/* Model terminate function */
void do_something_terminate(void)
{
/* (no terminate code required) */
}
/*
* File trailer for generated code.
*
* [EOF]
*/
/*
* File: do_something.h
*
* Code generated for Simulink model 'do_something'.
*
* Model version : 1.2
* Simulink Coder version : 8.12 (R2017a) 16-Feb-2017
* C/C++ source code generated on : Thu Jan 31 17:24:34 2019
*
* Target selection: ert.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#ifndef RTW_HEADER_do_something_h_
#define RTW_HEADER_do_something_h_
#include <string.h>
#include <stddef.h>
#ifndef do_something_COMMON_INCLUDES_
# define do_something_COMMON_INCLUDES_
#include "rtwtypes.h"
#endif /* do_something_COMMON_INCLUDES_ */
#include "do_something_types.h"
/* Macros for accessing real-time model data structure */
#ifndef rtmGetErrorStatus
# define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
#endif
#ifndef rtmSetErrorStatus
# define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
#endif
/* External inputs (root inport signals with auto storage) */
typedef struct {
Seq3 inp1; /* '<Root>/inp1' */
Seq3 inp2; /* '<Root>/inp2' */
Seq4 inp3; /* '<Root>/inp3' */
In_Nested innested; /* '<Root>/innested' */
} ExtU_do_something_T;
/* External outputs (root outports fed by signals with auto storage) */
typedef struct {
Seqout outpu; /* '<Root>/outpu' */
Out_Nested outnested; /* '<Root>/outnested' */
} ExtY_do_something_T;
/* Real-time Model Data Structure */
struct tag_RTM_do_something_T {
const char_T * volatile errorStatus;
};
/* External inputs (root inport signals with auto storage) */
extern ExtU_do_something_T do_something_U;
/* External outputs (root outports fed by signals with auto storage) */
extern ExtY_do_something_T do_something_Y;
/* Model entry point functions */
extern void do_something_initialize(void);
extern void do_something_step(void);
extern void do_something_terminate(void);
/* Real-time Model object */
extern RT_MODEL_do_something_T *const do_something_M;
/*-
* The generated code includes comments that allow you to trace directly
* back to the appropriate location in the model. The basic format
* is <system>/block_name, where system is the system number (uniquely
* assigned by Simulink) and block_name is the name of the block.
*
* Use the MATLAB hilite_system command to trace the generated code back
* to the model. For example,
*
* hilite_system('<S3>') - opens system 3
* hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
*
* Here is the system hierarchy for this model
*
* '<Root>' : 'do_something'
*/
#endif /* RTW_HEADER_do_something_h_ */
/*
* File trailer for generated code.
*
* [EOF]
*/
/*
* File: do_something_private.h
*
* Code generated for Simulink model 'do_something'.
*
* Model version : 1.2
* Simulink Coder version : 8.12 (R2017a) 16-Feb-2017
* C/C++ source code generated on : Thu Jan 31 17:24:34 2019
*
* Target selection: ert.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#ifndef RTW_HEADER_do_something_private_h_
#define RTW_HEADER_do_something_private_h_
#include "rtwtypes.h"
#ifndef UCHAR_MAX
#include <limits.h>
#endif
#if ( UCHAR_MAX != (0xFFU) ) || ( SCHAR_MAX != (0x7F) )
#error Code was generated for compiler with different sized uchar/char. \
Consider adjusting Test hardware word size settings on the \
Hardware Implementation pane to match your compiler word sizes as \
defined in limits.h of the compiler. Alternatively, you can \
select the Test hardware is the same as production hardware option and \
select the Enable portable word sizes option on the Code Generation > \
Verification pane for ERT based targets, which will disable the \
preprocessor word size checks.
#endif
#if ( USHRT_MAX != (0xFFFFU) ) || ( SHRT_MAX != (0x7FFF) )
#error Code was generated for compiler with different sized ushort/short. \
Consider adjusting Test hardware word size settings on the \
Hardware Implementation pane to match your compiler word sizes as \
defined in limits.h of the compiler. Alternatively, you can \
select the Test hardware is the same as production hardware option and \
select the Enable portable word sizes option on the Code Generation > \
Verification pane for ERT based targets, which will disable the \
preprocessor word size checks.
#endif
#if ( UINT_MAX != (0xFFFFFFFFU) ) || ( INT_MAX != (0x7FFFFFFF) )
#error Code was generated for compiler with different sized uint/int. \
Consider adjusting Test hardware word size settings on the \
Hardware Implementation pane to match your compiler word sizes as \
defined in limits.h of the compiler. Alternatively, you can \
select the Test hardware is the same as production hardware option and \
select the Enable portable word sizes option on the Code Generation > \
Verification pane for ERT based targets, which will disable the \
preprocessor word size checks.
#endif
#if ( ULONG_MAX != (0xFFFFFFFFU) ) || ( LONG_MAX != (0x7FFFFFFF) )
#error Code was generated for compiler with different sized ulong/long. \
Consider adjusting Test hardware word size settings on the \
Hardware Implementation pane to match your compiler word sizes as \
defined in limits.h of the compiler. Alternatively, you can \
select the Test hardware is the same as production hardware option and \
select the Enable portable word sizes option on the Code Generation > \
Verification pane for ERT based targets, which will disable the \
preprocessor word size checks.
#endif
#endif /* RTW_HEADER_do_something_private_h_ */
/*
* File trailer for generated code.
*
* [EOF]
*/
/*
* File: do_something_types.h
*
* Code generated for Simulink model 'do_something'.
*
* Model version : 1.2
* Simulink Coder version : 8.12 (R2017a) 16-Feb-2017
* C/C++ source code generated on : Thu Jan 31 17:24:34 2019
*
* Target selection: ert.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#ifndef RTW_HEADER_do_something_types_h_
#define RTW_HEADER_do_something_types_h_
#include "rtwtypes.h"
#ifndef DEFINED_TYPEDEF_FOR_Seq3_
#define DEFINED_TYPEDEF_FOR_Seq3_
typedef struct {
int32_T element_data[3];
} Seq3;
#endif
#ifndef DEFINED_TYPEDEF_FOR_Seq4_
#define DEFINED_TYPEDEF_FOR_Seq4_
typedef struct {
int32_T element_data[4];
} Seq4;
#endif
#ifndef DEFINED_TYPEDEF_FOR_In_Nested_inest_a_
#define DEFINED_TYPEDEF_FOR_In_Nested_inest_a_
typedef struct {
int32_T element_data[4];
} In_Nested_inest_a;
#endif
#ifndef DEFINED_TYPEDEF_FOR_In_Nested_inest_b_
#define DEFINED_TYPEDEF_FOR_In_Nested_inest_b_
typedef struct {
int32_T element_data[3];
} In_Nested_inest_b;
#endif
#ifndef DEFINED_TYPEDEF_FOR_In_Nested_
#define DEFINED_TYPEDEF_FOR_In_Nested_
typedef struct {
In_Nested_inest_a inest_a;
In_Nested_inest_b inest_b;
} In_Nested;
#endif
#ifndef DEFINED_TYPEDEF_FOR_Out_Nested_onest_a_
#define DEFINED_TYPEDEF_FOR_Out_Nested_onest_a_
typedef struct {
int32_T element_data[7];
} Out_Nested_onest_a;
#endif
#ifndef DEFINED_TYPEDEF_FOR_Out_Nested_
#define DEFINED_TYPEDEF_FOR_Out_Nested_
typedef struct {
Out_Nested_onest_a onest_a;
} Out_Nested;
#endif
#ifndef DEFINED_TYPEDEF_FOR_Seqout_
#define DEFINED_TYPEDEF_FOR_Seqout_
typedef struct {
int32_T element_data[8];
} Seqout;
#endif
/* Forward declaration for rtModel */
typedef struct tag_RTM_do_something_T RT_MODEL_do_something_T;
#endif /* RTW_HEADER_do_something_types_h_ */
/*
* File trailer for generated code.
*
* [EOF]
*/
/*
* File: ert_main.c
*
* Code generated for Simulink model 'do_something'.
*
* Model version : 1.2
* Simulink Coder version : 8.12 (R2017a) 16-Feb-2017
* C/C++ source code generated on : Thu Jan 31 17:24:34 2019
*
* Target selection: ert.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#include <stddef.h>
#include <stdio.h> /* This ert_main.c example uses printf/fflush */
#include "do_something.h" /* Model's header file */
#include "rtwtypes.h"
/*
* Associating rt_OneStep with a real-time clock or interrupt service routine
* is what makes the generated code "real-time". The function rt_OneStep is
* always associated with the base rate of the model. Subrates are managed
* by the base rate from inside the generated code. Enabling/disabling
* interrupts and floating point context switches are target specific. This
* example code indicates where these should take place relative to executing
* the generated code step function. Overrun behavior should be tailored to
* your application needs. This example simply sets an error status in the
* real-time model and returns from rt_OneStep.
*/
void rt_OneStep(void);
void rt_OneStep(void)
{
static boolean_T OverrunFlag = false;
/* Disable interrupts here */
/* Check for overrun */
if (OverrunFlag) {
rtmSetErrorStatus(do_something_M, "Overrun");
return;
}
OverrunFlag = true;
/* Save FPU context here (if necessary) */
/* Re-enable timer or interrupt here */
/* Set model inputs here */
/* Step the model */
do_something_step();
/* Get model outputs here */
/* Indicate task complete */
OverrunFlag = false;
/* Disable interrupts here */
/* Restore FPU context here (if necessary) */
/* Enable interrupts here */
}
/*
* The example "main" function illustrates what is required by your
* application code to initialize, execute, and terminate the generated code.
* Attaching rt_OneStep to a real-time clock is target specific. This example
* illustrates how you do this relative to initializing the model.
*/
int_T main(int_T argc, const char *argv[])
{
/* Unused arguments */
(void)(argc);
(void)(argv);
/* Initialize model */
do_something_initialize();
/* Attach rt_OneStep to a timer or interrupt service routine with
* period 0.2 seconds (the model's base sample time) here. The
* call syntax for rt_OneStep is
*
* rt_OneStep();
*/
printf("Warning: The simulation will run forever. "
"Generated ERT main won't simulate model step behavior. "
"To change this behavior select the 'MAT-file logging' option.\n");
fflush((NULL));
while (rtmGetErrorStatus(do_something_M) == (NULL)) {
/* Perform other application tasks here */
}
/* Disable rt_OneStep() here */
/* Terminate model */
do_something_terminate();
return 0;
}
/*
* File trailer for generated code.
*
* [EOF]
*/
run Simulink_DataView_asn;
inports_positions = zeros(4, 4);
bussel_positions = zeros(4, 4);
outports_positions = zeros(2, 4);
buscre_positions = zeros(2, 4);
if (exist('do_something') == 4),
simulink('open');
load_system('do_something');
open_system('do_something');
inportHan = find_system('do_something','FindAll','on', 'SearchDepth', 1, 'BlockType','Inport');
outportHan = find_system('do_something','FindAll','on', 'SearchDepth', 1, 'BlockType','Outport');
% ---------------------------------------------------------------------------------
% start by removing the Bus Selectors / then lines / finally ports
% ---------------------------------------------------------------------------------
% get the handles of all the lines connected to inports
for i=1:length(inportHan)
inports_positions(i,:) = get_param(inportHan(i),'Position'); % remember Inport's position
line_structsIn(i)=get_param(inportHan(i),'LineHandles'); % get the structures
inLinesHan(i)=line_structsIn(i).Outport; % get the line connected to the block's Outport
if (inLinesHan(i) ~= -1) % if exists
dstBlock = get_param(inLinesHan(i),'DstBlockHandle'); % get the destination block's handle
if (strcmp(get_param(dstBlock,'BlockType'),'BusSelector'))
bussel_positions(i,:) = get_param(dstBlock,'Position'); % remember Bus Selector's position
blockLineStructs = get_param(dstBlock,'LineHandles'); % get the line connected structures
blockLineHandles = blockLineStructs.Outport; % get the line handlers connected to the bus's outports
for j=1:length(blockLineHandles)
if (blockLineHandles(j) ~= -1)
delete(blockLineHandles(j));
end
end
delete_block(dstBlock); % delete it if it is a Bus Selector Block
end
delete(inLinesHan(i)); % delete the respective line
end
delete_block(inportHan(i)); % delete the outdated inport block
end
% now remove the outports
for i=1:length(outportHan)
outports_positions(i,:) = get_param(outportHan(i),'Position'); % remember Outport's position
line_structsOut(i)=get_param(outportHan(i),'LineHandles'); % get the structures
outLinesHan(i)=line_structsOut(i).Inport; % get the line connected to the block's Inport
if (outLinesHan(i) ~= -1) % if exists
srcBlock = get_param(outLinesHan(i),'SrcBlockHandle'); % get the source block's handle
if (strcmp(get_param(srcBlock,'BlockType'),'BusCreator'))
buscre_positions(i,:) = get_param(srcBlock,'Position'); % remember Bus Creator's position
blockLineStructs = get_param(srcBlock,'LineHandles'); % get the line connected structures
blockLineHandles = blockLineStructs.Inport; % get the line handlers connected to the bus's outports
for j=1:length(blockLineHandles)
if (blockLineHandles(j) ~= -1)
delete(blockLineHandles(j));
end
end
delete_block(srcBlock); % delete it if it is a Bus Creator Block
end
delete(outLinesHan(i)); % delete the respective line
end
delete_block(outportHan(i)); % delete the outdated outport block
end
else
simulink('open');
new_system('do_something');
open_system('do_something');
end
add_block('simulink/Sources/In1','do_something/inp1');
if inports_positions(1)>0
set_param('do_something/inp1','Position', inports_positions(1,:));
else
set_param('do_something/inp1','Position',[25 25 55 39]);
end
set_param('do_something/inp1','BusOutputAsStruct','on');
set_param('do_something/inp1','UseBusObject','on');
set_param('do_something/inp1','BusObject','Seq3');
add_block('simulink/Commonly Used Blocks/Bus Selector','do_something/inp1_Seq3_BusSel');
add_line('do_something','inp1/1','inp1_Seq3_BusSel/1');
setOutputsBusSelector(Seq3, 'do_something/inp1_Seq3_BusSel');
if bussel_positions(1)>0
set_param('do_something/inp1_Seq3_BusSel','Position', bussel_positions(1,:));
else
set_param('do_something/inp1_Seq3_BusSel','Position',[95 6 100 44]);
end
add_block('simulink/Sources/In1','do_something/inp2');
if inports_positions(2)>0
set_param('do_something/inp2','Position', inports_positions(2,:));
else
set_param('do_something/inp2','Position',[25 125 55 139]);
end
set_param('do_something/inp2','BusOutputAsStruct','on');
set_param('do_something/inp2','UseBusObject','on');
set_param('do_something/inp2','BusObject','Seq3');
add_block('simulink/Commonly Used Blocks/Bus Selector','do_something/inp2_Seq3_BusSel');
add_line('do_something','inp2/1','inp2_Seq3_BusSel/1');
setOutputsBusSelector(Seq3, 'do_something/inp2_Seq3_BusSel');
if bussel_positions(2)>0
set_param('do_something/inp2_Seq3_BusSel','Position', bussel_positions(2,:));
else
set_param('do_something/inp2_Seq3_BusSel','Position',[95 106 100 144]);
end
add_block('simulink/Sources/In1','do_something/inp3');
if inports_positions(3)>0
set_param('do_something/inp3','Position', inports_positions(3,:));
else
set_param('do_something/inp3','Position',[25 225 55 239]);
end
set_param('do_something/inp3','BusOutputAsStruct','on');
set_param('do_something/inp3','UseBusObject','on');
set_param('do_something/inp3','BusObject','Seq4');
add_block('simulink/Commonly Used Blocks/Bus Selector','do_something/inp3_Seq4_BusSel');
add_line('do_something','inp3/1','inp3_Seq4_BusSel/1');
setOutputsBusSelector(Seq4, 'do_something/inp3_Seq4_BusSel');
if bussel_positions(3)>0
set_param('do_something/inp3_Seq4_BusSel','Position', bussel_positions(3,:));
else
set_param('do_something/inp3_Seq4_BusSel','Position',[95 206 100 244]);
end
add_block('simulink/Sources/In1','do_something/innested');
if inports_positions(4)>0
set_param('do_something/innested','Position', inports_positions(4,:));
else
set_param('do_something/innested','Position',[25 325 55 339]);
end
set_param('do_something/innested','BusOutputAsStruct','on');
set_param('do_something/innested','UseBusObject','on');
set_param('do_something/innested','BusObject','In_Nested');
add_block('simulink/Commonly Used Blocks/Bus Selector','do_something/innested_In_Nested_BusSel');
add_line('do_something','innested/1','innested_In_Nested_BusSel/1');
setOutputsBusSelector(In_Nested, 'do_something/innested_In_Nested_BusSel');
if bussel_positions(4)>0
set_param('do_something/innested_In_Nested_BusSel','Position', bussel_positions(4,:));
else
set_param('do_something/innested_In_Nested_BusSel','Position',[95 306 100 344]);
end
add_block('simulink/Sinks/Out1','do_something/outpu');
if outports_positions(1)>0
set_param('do_something/outpu','Position', outports_positions(1,:));
else
set_param('do_something/outpu','Position',[430 25 460 39]);
end
set_param('do_something/outpu','UseBusObject','on');
set_param('do_something/outpu','BusObject','Seqout');
add_block('simulink/Commonly Used Blocks/Bus Creator','do_something/outpu_Seqout_BusCre');
add_line('do_something','outpu_Seqout_BusCre/1','outpu/1');
setInputsBusCreator(Seqout,'do_something/outpu_Seqout_BusCre');
set_param('do_something/outpu','UseBusObject','on');
set_param('do_something/outpu','BusOutputAsStruct','on');
set_param('do_something/outpu_Seqout_BusCre','BusObject','Seqout');
if buscre_positions(1)>0
set_param('do_something/outpu_Seqout_BusCre','Position', buscre_positions(1,:));
else
set_param('do_something/outpu_Seqout_BusCre','Position',[360 6 365 44]);
end
set_param('do_something/outpu_Seqout_BusCre','UseBusObject','on');
set_param('do_something/outpu_Seqout_BusCre','NonVirtualBus','on');
add_block('simulink/Sinks/Out1','do_something/outnested');
if outports_positions(2)>0
set_param('do_something/outnested','Position', outports_positions(2,:));
else
set_param('do_something/outnested','Position',[430 125 460 139]);
end
set_param('do_something/outnested','UseBusObject','on');
set_param('do_something/outnested','BusObject','Out_Nested');
add_block('simulink/Commonly Used Blocks/Bus Creator','do_something/outnested_Out_Nested_BusCre');
add_line('do_something','outnested_Out_Nested_BusCre/1','outnested/1');
setInputsBusCreator(Out_Nested,'do_something/outnested_Out_Nested_BusCre');
set_param('do_something/outnested','UseBusObject','on');
set_param('do_something/outnested','BusOutputAsStruct','on');
set_param('do_something/outnested_Out_Nested_BusCre','BusObject','Out_Nested');
if buscre_positions(2)>0
set_param('do_something/outnested_Out_Nested_BusCre','Position', buscre_positions(2,:));
else
set_param('do_something/outnested_Out_Nested_BusCre','Position',[360 106 365 144]);
end
set_param('do_something/outnested_Out_Nested_BusCre','UseBusObject','on');
set_param('do_something/outnested_Out_Nested_BusCre','NonVirtualBus','on');
set_param('do_something','SaveOutput','off');
set_param('do_something','SignalLogging','off');
set_param('do_something','SaveTime','off')
set_param('do_something','Solver','FixedStepDiscrete');
set_param('do_something','SystemTargetFile','ert.tlc');
set_param('do_something','TemplateMakefile','ert_default_tmf');
set_param('do_something', 'PostCodeGenCommand', 'packNGo(buildInfo);');
set_param('do_something','StrictBusMsg','ErrorLevel1')
save_system('do_something');