Commit 688674b1 authored by Tiago Jorge's avatar Tiago Jorge
Browse files

Nominal example updated: 2nd HW block added; Runtime reconfigurator added; See...

Nominal example updated: 2nd HW block added; Runtime reconfigurator added; See README; Execution log and images of the 2 Simulink diagrams included.
parent 23edb2d7
......@@ -24,6 +24,8 @@ PUBLIC
WITH interfaceview::IV::Calling;
WITH interfaceview::IV::Gnc;
WITH interfaceview::IV::fpga_reconfiguration_engine;
WITH interfaceview::IV::Gnc2;
WITH ocarina_processors_leon;
WITH deploymentview::DV::Node1;
WITH Taste;
......@@ -41,6 +43,12 @@ SUBCOMPONENTS
IV_Gnc : SYSTEM interfaceview::IV::Gnc::Gnc.others {
Taste::FunctionName => "Gnc";
};
IV_fpga_reconfiguration_engine : SYSTEM interfaceview::IV::fpga_reconfiguration_engine::fpga_reconfiguration_engine.others {
Taste::FunctionName => "fpga_reconfiguration_engine";
};
IV_Gnc2 : SYSTEM interfaceview::IV::Gnc2::Gnc2.others {
Taste::FunctionName => "Gnc2";
};
gr740_partition : PROCESS deploymentview::DV::Node1::gr740_partition.others {
Taste::coordinates => "90703 54292 127086 70804";
Deployment::Port_Number => 0;
......@@ -51,6 +59,8 @@ SUBCOMPONENTS
PROPERTIES
Taste::APLC_Binding => (reference (gr740_partition)) APPLIES TO IV_Calling;
Taste::APLC_Binding => (reference (gr740_partition)) APPLIES TO IV_Gnc;
Taste::APLC_Binding => (reference (gr740_partition)) APPLIES TO IV_fpga_reconfiguration_engine;
Taste::APLC_Binding => (reference (gr740_partition)) APPLIES TO IV_Gnc2;
Actual_Processor_Binding => (reference (gr740_rcc13rc5_posix)) APPLIES TO gr740_partition;
END Node1.others;
......
......@@ -9,6 +9,8 @@ PACKAGE interfaceview::IV::Calling
PUBLIC
WITH interfaceview::IV::Gnc;
WITH interfaceview::IV::fpga_reconfiguration_engine;
WITH interfaceview::IV::Gnc2;
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
......@@ -22,6 +24,16 @@ PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_pulse.others;
SUBPROGRAM PI_changeMode
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_changeMode;
SUBPROGRAM IMPLEMENTATION PI_changeMode.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_changeMode.others;
SUBPROGRAM RI_do_something
FEATURES
inp1 : IN PARAMETER DataView::Seq3 {
......@@ -47,6 +59,60 @@ END RI_do_something;
SUBPROGRAM IMPLEMENTATION RI_do_something.others
END RI_do_something.others;
SUBPROGRAM RI_init
END RI_init;
SUBPROGRAM IMPLEMENTATION RI_init.others
END RI_init.others;
SUBPROGRAM RI_run
FEATURES
spi_address : IN PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
size : IN PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
END RI_run;
SUBPROGRAM IMPLEMENTATION RI_run.others
END RI_run.others;
SUBPROGRAM RI_status
FEATURES
fpga_status : OUT PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
END RI_status;
SUBPROGRAM IMPLEMENTATION RI_status.others
END RI_status.others;
SUBPROGRAM RI_do_something2
FEATURES
inp1 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp2 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp3 : IN PARAMETER DataView::Seq4 {
Taste::encoding => NATIVE;
};
outpu : OUT PARAMETER DataView::Seqout {
Taste::encoding => NATIVE;
};
innested : IN PARAMETER DataView::In_Nested {
Taste::encoding => NATIVE;
};
outnested : OUT PARAMETER DataView::Out_Nested {
Taste::encoding => NATIVE;
};
END RI_do_something2;
SUBPROGRAM IMPLEMENTATION RI_do_something2.others
END RI_do_something2.others;
SYSTEM Calling
FEATURES
PI_pulse : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::Calling::PI_pulse.others {
......@@ -56,12 +122,43 @@ FEATURES
Taste::Deadline => 0 ms;
Taste::InterfaceName => "pulse";
};
PI_changeMode : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::Calling::PI_changeMode.others {
Taste::coordinates => "111658 56233";
Taste::RCMoperationKind => cyclic;
Taste::RCMperiod => 3000 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "changeMode";
};
RI_do_something : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::Gnc::PI_do_something.others {
Taste::coordinates => "134118 68838";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "do_something";
Taste::labelInheritance => "true";
};
RI_init : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_init.others {
Taste::coordinates => "108721 94530";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "init";
Taste::labelInheritance => "true";
};
RI_run : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_run.others {
Taste::coordinates => "125534 94530";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "run";
Taste::labelInheritance => "true";
};
RI_status : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_status.others {
Taste::coordinates => "97597 94530";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "status";
Taste::labelInheritance => "true";
};
RI_do_something2 : REQUIRES SUBPROGRAM ACCESS interfaceview::IV::Gnc2::PI_do_something2.others {
Taste::coordinates => "134118 75133";
Taste::RCMoperationKind => any;
Taste::InterfaceName => "do_something2";
Taste::labelInheritance => "true";
};
PROPERTIES
Source_Language => (C);
Taste::Active_Interfaces => any;
......@@ -110,7 +207,7 @@ END PI_do_something.others;
SYSTEM Gnc
FEATURES
PI_do_something : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::Gnc::PI_do_something.others {
Taste::coordinates => "185019 83379";
Taste::coordinates => "174484 81134";
Taste::RCMoperationKind => protected;
Taste::RCMperiod => 0 ms;
Taste::Deadline => 0 ms;
......@@ -126,11 +223,151 @@ END Gnc.others;
END interfaceview::IV::Gnc;
PACKAGE interfaceview::IV::fpga_reconfiguration_engine
PUBLIC
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
SUBPROGRAM PI_init
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_init;
SUBPROGRAM IMPLEMENTATION PI_init.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_init.others;
SUBPROGRAM PI_run
FEATURES
spi_address : IN PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
size : IN PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_run;
SUBPROGRAM IMPLEMENTATION PI_run.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_run.others;
SUBPROGRAM PI_status
FEATURES
fpga_status : OUT PARAMETER DataView::MyInteger {
Taste::encoding => NATIVE;
};
PROPERTIES
Taste::Associated_Queue_Size => 1;
END PI_status;
SUBPROGRAM IMPLEMENTATION PI_status.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_status.others;
SYSTEM fpga_reconfiguration_engine
FEATURES
PI_init : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_init.others {
Taste::coordinates => "120167 113227";
Taste::RCMoperationKind => unprotected;
Taste::RCMperiod => 0 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "init";
};
PI_run : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_run.others {
Taste::coordinates => "135308 113227";
Taste::RCMoperationKind => unprotected;
Taste::RCMperiod => 0 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "run";
};
PI_status : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::fpga_reconfiguration_engine::PI_status.others {
Taste::coordinates => "99407 113227";
Taste::RCMoperationKind => unprotected;
Taste::RCMperiod => 0 ms;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "status";
};
PROPERTIES
Source_Language => (C);
Taste::Active_Interfaces => any;
END fpga_reconfiguration_engine;
SYSTEM IMPLEMENTATION fpga_reconfiguration_engine.others
SUBCOMPONENTS
flagToLinkWith : DATA DataView::Taste_directive {
Taste::FS_Default_Value => "linker-option:""-L$PRJ_FOLDER/external_libs/lib -lmdw""";
};
flagsToCompileWith : DATA DataView::Taste_directive {
Taste::FS_Default_Value => "compiler-option:""-I$PRJ_FOLDER/external_libs/inc""";
};
END fpga_reconfiguration_engine.others;
END interfaceview::IV::fpga_reconfiguration_engine;
PACKAGE interfaceview::IV::Gnc2
PUBLIC
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
SUBPROGRAM PI_do_something2
FEATURES
inp1 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp2 : IN PARAMETER DataView::Seq3 {
Taste::encoding => NATIVE;
};
inp3 : IN PARAMETER DataView::Seq4 {
Taste::encoding => NATIVE;
};
outpu : OUT PARAMETER DataView::Seqout {
Taste::encoding => NATIVE;
};
innested : IN PARAMETER DataView::In_Nested {
Taste::encoding => NATIVE;
};
outnested : OUT PARAMETER DataView::Out_Nested {
Taste::encoding => NATIVE;
};
END PI_do_something2;
SUBPROGRAM IMPLEMENTATION PI_do_something2.others
PROPERTIES
Compute_Execution_Time => 0 ms .. 0 ms;
END PI_do_something2.others;
SYSTEM Gnc2
FEATURES
PI_do_something2 : PROVIDES SUBPROGRAM ACCESS interfaceview::IV::Gnc2::PI_do_something2.others {
Taste::coordinates => "172121 115903";
Taste::RCMoperationKind => protected;
Taste::Deadline => 0 ms;
Taste::InterfaceName => "do_something2";
};
PROPERTIES
Source_Language => (Simulink);
Taste::Active_Interfaces => any;
END Gnc2;
SYSTEM IMPLEMENTATION Gnc2.others
END Gnc2.others;
END interfaceview::IV::Gnc2;
PACKAGE interfaceview::IV
PUBLIC
WITH interfaceview::IV::Calling;
WITH interfaceview::IV::Gnc;
WITH interfaceview::IV::fpga_reconfiguration_engine;
WITH interfaceview::IV::Gnc2;
WITH Taste;
WITH DataView;
WITH TASTE_IV_Properties;
......@@ -146,12 +383,31 @@ SUBCOMPONENTS
Taste::coordinates => "84026 56233 134118 94530";
};
Gnc : SYSTEM interfaceview::IV::Gnc::Gnc.others {
Taste::coordinates => "185019 63827 246584 104386";
Taste::coordinates => "174484 61582 236049 102141";
TASTE_IV_Properties::FPGA_Configurations => "modeA,modeB";
};
fpga_reconfiguration_engine : SYSTEM interfaceview::IV::fpga_reconfiguration_engine::fpga_reconfiguration_engine.others {
Taste::coordinates => "90205 113227 140857 136625";
};
Gnc2 : SYSTEM interfaceview::IV::Gnc2::Gnc2.others {
Taste::coordinates => "172121 106297 232592 141099";
TASTE_IV_Properties::FPGA_Configurations => "modeC";
};
CONNECTIONS
Gnc_PI_do_something_Calling_RI_do_something : SUBPROGRAM ACCESS Gnc.PI_do_something -> Calling.RI_do_something {
Taste::coordinates => "134118 68838 156256 68838 156256 83379 185019 83379";
Taste::coordinates => "134118 68838 156256 68838 156256 81134 174484 81134";
};
fpga_reconfiguration_engine_PI_init_Calling_RI_init : SUBPROGRAM ACCESS fpga_reconfiguration_engine.PI_init -> Calling.RI_init {
Taste::coordinates => "108721 94530 108721 103878 120167 103878 120167 113227";
};
fpga_reconfiguration_engine_PI_run_Calling_RI_run : SUBPROGRAM ACCESS fpga_reconfiguration_engine.PI_run -> Calling.RI_run {
Taste::coordinates => "125534 94530 125534 103878 135308 103878 135308 113227";
};
fpga_reconfiguration_engine_PI_status_Calling_RI_status : SUBPROGRAM ACCESS fpga_reconfiguration_engine.PI_status -> Calling.RI_status {
Taste::coordinates => "97597 94530 97597 103878 99407 103878 99407 113227";
};
Gnc2_PI_do_something2_Calling_RI_do_something2 : SUBPROGRAM ACCESS Gnc2.PI_do_something2 -> Calling.RI_do_something2 {
Taste::coordinates => "134118 75133 153119 75133 153119 115903 172121 115903";
};
END interfaceview.others;
......
1. "bravebitfiles.h" is not auto generated when using the "--no-bitfiles" option.
The one generated for this project is for convenience included in the project's root.
It should be copied under "binary.c/auto-src" after the first build attempt (which should fail). The second build attempt should work.
2. This project as a dependency on the reconfiguration drivers (directory <project's root>/"external_libs/"). This directory is not public and should be requested by other means.
struct config_bitfile {
char *config;
char *global_status_var;
int offset;
int size;
};
extern char globalFpgaStatus_gnc[20];
extern char globalFpgaStatus_gnc2[20];
struct config_bitfile bitfiles[] = {
"modeA", globalFpgaStatus_gnc, 0, 211460,
"modeB", globalFpgaStatus_gnc, 0, 211460,
"modeC", globalFpgaStatus_gnc2, 1526250, 177088
};
......@@ -69,6 +69,10 @@ cd "$SKELS" && rm -f calling.zip && zip -r calling calling/* && cd $OLDPWD || ex
cd "$SKELS" && rm -f gnc.zip && zip -r gnc gnc/* && cd $OLDPWD || exit -1
cd "$SKELS" && rm -f fpga_reconfiguration_engine.zip && zip -r fpga_reconfiguration_engine fpga_reconfiguration_engine/* && cd $OLDPWD || exit -1
cd "$SKELS" && rm -f gnc2.zip && zip -r gnc2 gnc2/* && cd $OLDPWD || exit -1
[ ! -z "$CLEANUP" ] && rm -rf binary*
if [ -f ConcurrencyView.pro ]
......@@ -121,6 +125,8 @@ cd "$CWD" && assert-builder-ocarina.py \
-o "$OUTPUTDIR" \
--subC calling:"$SKELS"/calling.zip \
--subSIMULINK gnc:"$SKELS"/gnc.zip \
--subC fpga_reconfiguration_engine:"$SKELS"/fpga_reconfiguration_engine.zip \
--subSIMULINK gnc2:"$SKELS"/gnc2.zip \
$ORCHESTRATOR_OPTIONS
if [ -f user_init_last.sh ]
......
......@@ -4,7 +4,9 @@
#include <string.h>
#include <stdio.h>
char p_szGlobalState[] = "modeX";
#include "bravebitfiles.h"
char p_szGlobalState[10] = "modeX";
#define FPGA_READY "ready"
#define FPGA_RECONFIGURING "reconfiguring"
......@@ -16,37 +18,116 @@ char p_szGlobalState[] = "modeX";
// This status shall be updated by the HW reconfiguration manager commanding of the FPGA and FPGA status check,
// and can be one of: FPGA_READY, FPGA_RECONFIGURING, FPGA_ERROR, FPGA_DISABLED.
// Status is kept per Function Block and not for the full FPGA, to accommodate for future work on partial reconfiguration of the HW accelerator.
char globalFpgaStatus_gnc[20] = FPGA_READY;
char globalFpgaStatus_gnc[20] = FPGA_DISABLED;
char globalFpgaStatus_gnc2[20] = FPGA_DISABLED;
// Print any output only at the end of the test run (using sprintf to array), to avoid the usual real time degradation of console prints.
#define NR_MODE_SWITCHES 40
char testLog[40 * NR_MODE_SWITCHES][100];
int line = 0;
int get_bitfile_info(char *config, char **global_status_var, asn1SccMyInteger *offset, asn1SccMyInteger *size)
{
int headerfile_entries = 0;
headerfile_entries = sizeof(bitfiles)/sizeof(struct config_bitfile);
printf("[get_bitfile_info] There are %d headerfile entries.\n", headerfile_entries);
for(int i = 0; i < headerfile_entries; i++){
printf("[get_bitfile_info] Mode index %d is %s\n", i, bitfiles[i].config);
if (strcmp(config, bitfiles[i].config) == 0) {
printf("[get_bitfile_info] Mode found in index %d which is %s\n", i, bitfiles[i].config);
*global_status_var = bitfiles[i].global_status_var;
*offset = bitfiles[i].offset;
*size = bitfiles[i].size;
return 0;
}
}
return 1;
}
void calling_startup()
{
/* Write your initialization code here,
but do not make any call to a required interface. */
sprintf(testLog[line++], "\n[calling_startup] Starting up ...\n");
printf("\n[calling_startup] Starting up ...\n");
/* ## FPGA reconfiguration engine init */
calling_RI_init();
}
void calling_PI_pulse()
void calling_PI_changeMode()
{
/* Write your code here! */
static int ite = 0;
if(ite == (3 * NR_MODE_SWITCHES)) { // at ~ (3 * NR_MODE_SWITCHES) sec print log
for(int i = 0; i <= line; i++){
printf(testLog[i]);
printf("\n[calling_PI_changeMode] Current mode is %s\n", p_szGlobalState);
/* FPGA reconfiguration engine part */
static asn1SccMyInteger fpga_status = 1;
static asn1SccMyInteger offset = -1;
static asn1SccMyInteger size = -1;
char new_config[10] = "";
if (strcmp(p_szGlobalState, "modeX") == 0) {
strcpy(new_config, "modeA");
}else{
if (strcmp(p_szGlobalState, "modeA") == 0) {
strcpy(new_config, "modeC");
}else{
strcpy(new_config, "modeX");
}
ite++;
return;
}
if(ite > (3 * NR_MODE_SWITCHES)) { // do noth
return;
}
printf("[calling_PI_changeMode] Initiating mode change %s => %s ... \n", p_szGlobalState, new_config);
sprintf(testLog[line++], "\n[calling_PI_pulse] Current mode is %s\n", p_szGlobalState);
/* ! header file is under binary.c/auto-src
use it to map mode to bit stream offset and size that engine needs */
// update global variables to value FPGA_RECONFIGURING
// see calling.c where global variable is defined (and its values): here is globalFpgaStatus_gnc
// do not hardcode: rule here is the variables will always be named 'globalFpgaStatus_' + hw funcion block name (in this case 'gnc')
// the hw funcion block name (in this case 'gnc') which corresponds to the mode can also be retrieved from the header file
// this variable should be updated so that applications know if function is still operational in the FPGA
char *global_status_var;
offset = -1;
size = -1;
if (!get_bitfile_info(new_config, &global_status_var, &offset, &size)){
printf("[calling_PI_changeMode] bitfile info is: global_status_var prev - %s, offset - %lld, size - %lld\n", global_status_var, offset, size);
// DISABLE ALL
strcpy(globalFpgaStatus_gnc, FPGA_DISABLED);
strcpy(globalFpgaStatus_gnc2, FPGA_DISABLED);
// SET NEXT AS RECONFIGURING
strcpy(global_status_var, FPGA_RECONFIGURING);
printf("[calling_PI_changeMode] global_status_var now is - %s\n", global_status_var);
printf("[calling_PI_changeMode] cross check: globalFpgaStatus_gnc now is - %s\n", globalFpgaStatus_gnc);
printf("[calling_PI_changeMode] cross check: globalFpgaStatus_gnc2 now is - %s\n", globalFpgaStatus_gnc2);
// CALL engine
/* ## FPGA reconfiguration engine status */
calling_RI_status(&fpga_status);
printf("[calling_PI_changeMode] FPGA STATUS before reconf = %lld\n", fpga_status);
/* ## FPGA reconfiguration engine configuration */
calling_RI_run(&offset, &size);
/* ## FPGA reconfiguration engine status */
calling_RI_status(&fpga_status);
printf("[calling_PI_changeMode] FPGA STATUS after reconf = %lld\n", fpga_status);
// update again global variables to new value depending on the FPGA state: FPGA_READY? FPGA_ERROR?
if (fpga_status){
strcpy(global_status_var, FPGA_READY);
printf("[calling_PI_changeMode] New config loaded with success.\n");
strcpy(p_szGlobalState, new_config);
printf("[calling_PI_changeMode] NEW mode is %s\n", p_szGlobalState);
}else{
strcpy(global_status_var, FPGA_ERROR);
printf("[calling_PI_changeMode] New config could not be loaded!\n");
printf("[calling_PI_changeMode] STAY in mode %s\n", p_szGlobalState);
}
}else{
printf("[calling_PI_changeMode] New (HW) config not found... SW mode applies.\n");
strcpy(p_szGlobalState, new_config);
printf("[calling_PI_changeMode] NEW mode is %s\n", p_szGlobalState);
}
}
void calling_PI_pulse()
{
printf("\n[calling_PI_pulse] Current mode is %s\n", p_szGlobalState);
static asn1SccSeq3 in1 = {0,0,0};
static asn1SccSeq3 in2 = {1,1,1};
static asn1SccSeq4 in3 = {2,2,2,2};
......@@ -55,29 +136,25 @@ void calling_PI_pulse()
asn1SccSeqout out1 = {0,0,0,0,0,0,0,0};
asn1SccOut_Nested outn = {{0,0,0,0,0,0,0}};
sprintf(testLog[line++], "[calling_PI_pulse] Calling 'do_something'\n");
calling_RI_do_something(&in1, &in2, &in3, &inn, &out1, &outn);
sprintf(testLog[line++], "[calling_PI_pulse] Sent: %lld %lld %lld\n", in1.arr[0], in1.arr[1], in1.arr[2]);
sprintf(testLog[line++], "[calling_PI_pulse] Sent: %lld %lld %lld\n", in2.arr[0], in2.arr[1], in2.arr[2]);
sprintf(testLog[line++], "[calling_PI_pulse] Sent: %lld %lld %lld %lld\n", in3.arr[0], in3.arr[1], in3.arr[2], in3.arr[3]);
sprintf(testLog[line++], "[calling_PI_pulse] Sent: {%lld %lld %lld %lld - %lld %lld %lld}\n\n", inn.inest_a.arr[0], inn.inest_a.arr[1], inn.inest_a.arr[2], inn.inest_a.arr[3], inn.inest_b.arr[0], inn.inest_b.arr[1], inn.inest_b.arr[2]);
if (strcmp(p_szGlobalState, "modeC") == 0) {
printf("[calling_PI_pulse] Calling 'do_something2'\n");
calling_RI_do_something2(&in1, &in2, &in3, &inn, &out1, &outn);
}else{
printf("[calling_PI_pulse] Calling 'do_something'\n");
calling_RI_do_something(&in1, &in2, &in3, &inn, &out1, &outn);
}
printf("[calling_PI_pulse] Sent: %lld %lld %lld\n", in1.arr[0], in1.arr[1], in1.arr[2]);
printf("[calling_PI_pulse] Sent: %lld %lld %lld\n", in2.arr[0], in2.arr[1], in2.arr[2]);
printf("[calling_PI_pulse] Sent: %lld %lld %lld %lld\n", in3.arr[0], in3.arr[1], in3.arr[2], in3.arr[3]);
printf("[calling_PI_pulse] Sent: {%lld %lld %lld %lld - %lld %lld %lld}\n\n", inn.inest_a.arr[0], inn.inest_a.arr[1], inn.inest_a.arr[2], inn.inest_a.arr[3], inn.inest_b.arr[0], inn.inest_b.arr[1], inn.inest_b.arr[2]);
sprintf(testLog[line++], "[calling_PI_pulse] Received: %lld %lld %lld %lld %lld %lld %lld %lld\n", out1.arr[0], out1.arr[1], out1.arr[2], out1.arr[3], out1.arr[4], out1.arr[5], out1.arr[6], out1.arr[7]);
sprintf(testLog[line++], "[calling_PI_pulse] Received: {%lld %lld %lld %lld %lld %lld %lld}\n", outn.onest_a.arr[0], outn.onest_a.arr[1], outn.onest_a.arr[2], outn.onest_a.arr[3], outn.onest_a.arr[4], outn.onest_a.arr[5], outn.onest_a.arr[6]);
printf("[calling_PI_pulse] Received: %lld %lld %lld %lld %lld %lld %lld %lld\n", out1.arr[0], out1.arr[1], out1.arr[2], out1.arr[3], out1.arr[4], out1.arr[5], out1.arr[6], out1.arr[7]);
printf("[calling_PI_pulse] Received: {%lld %lld %lld %lld %lld %lld %lld}\n", outn.onest_a.arr[0], outn.onest_a.arr[1], outn.onest_a.arr[2], outn.onest_a.arr[3], outn.onest_a.arr[4], outn.onest_a.arr[5], outn.onest_a.arr[6]);
in1.arr[0]++; in1.arr[1]++; in1.arr[2]++;
in2.arr[0]++; in2.arr[1]++; in2.arr[2]++;
in3.arr[0]++; in3.arr[1]++; in3.arr[2]++; in3.arr[3]++;
inn.inest_a.arr[0]++; inn.inest_a.arr[1]++; inn.inest_a.arr[2]++; inn.inest_a.arr[3]++; inn.inest_b.arr[0]++; inn.inest_b.arr[1]++; inn.inest_b.arr[2]++;
ite++;
if((ite % 3) == 0) { // each 3 sec
sprintf(testLog[line++], "\n[calling_PI_pulse] ************** Switching Configuration (SW <> HW) **************");
if (!strcmp(p_szGlobalState, "modeA")) {
strcpy(p_szGlobalState, "modeX");
} else {
strcpy(p_szGlobalState, "modeA");
}
};
}
......@@ -15,6 +15,8 @@ void calling_startup();
void calling_PI_pulse();
void calling_PI_changeMode();
extern void calling_RI_do_something(const asn1SccSeq3 *,
const asn1SccSeq3 *,
const asn1SccSeq4 *,
......@@ -22,6 +24,20 @@ extern void calling_RI_do_something(const asn1SccSeq3 *,
asn1SccSeqout *,
asn1SccOut_Nested *);