Commit 80c6da52 authored by julien.delange's avatar julien.delange

* po-hi-c/include/po_hi_protected.h

 * po-hi-c/include/po_hi_transport.h
   - Fix to compile with embedded libc

 * po-hi-c/src/po_hi_protected.c
   - Handle PIP and IPCP protocols

 * po-hi-c/src/po_hi_gprof_rtems_leon.c
   - Begin to handle GPROF for LEON over serial line

 * po-hi-c/src/drivers/po_hi_driver_sockets.c
   - Handle RTEMS NE2000 driver

 * po-hi-c/src/drivers/po_hi_driver_rasta_common.c
   po-hi-c/src/drivers/po_hi_driver_rasta_serial.c
   po-hi-c/src/drivers/po_hi_driver_rasta_spacewire.c
   - Some fixes for the FPGA/LEON/RASTA integration

 * po-hi-c/share/make/Makefile.common
   - Fix flags and compilated files to include

 * po-hi-c/configure.ac
   - Fix list address



git-svn-id: https://tecsw.estec.esa.int/svn/taste/trunk/po-hi-c@1651 129961e7-ef38-4bb5-a8f7-c9a525a55882
parent dcd84200
AC_PREREQ(2.60)
AC_INIT(PolyORB-HI/C, 1.0w, polyorb-hi-devel@listes.enst.fr)
AC_INIT(PolyORB-HI/C, 1.0w, taste-dev@lists.tuxfamily.org)
AC_CONFIG_SRCDIR(src)
AC_CONFIG_AUX_DIR(support)
......
......@@ -13,9 +13,9 @@
#include <stdint.h>
#include <deployment.h>
#define __PO_HI_PROTECTED_TYPE_REGULAR
#define __PO_HI_PROTECTED_TYPE_PIP
#define __PO_HI_PROTECTED_TYPE_PCP
#define __PO_HI_PROTECTED_TYPE_REGULAR 0
#define __PO_HI_PROTECTED_TYPE_PIP 1
#define __PO_HI_PROTECTED_TYPE_PCP 2
typedef uint8_t __po_hi_protected_t;
......
......@@ -20,6 +20,8 @@
#define __PO_HI_BIGENDIAN 0
#define __PO_HI_LITTLEENDIAN 1
#if __PO_HI_NB_PORTS > 0
typedef uint8_t __po_hi_queue_id;
__po_hi_node_t __po_hi_transport_get_node_from_entity (const __po_hi_entity_t entity);
......@@ -44,11 +46,11 @@ char* __po_hi_get_port_name (const __po_hi_port_t port);
__po_hi_local_port_t __po_hi_get_local_port_from_global_port (const __po_hi_port_t global_port);
__po_hi_uint8_t __po_hi_get_endianness (const __po_hi_node_t node);
#if __PO_HI_NB_DEVICES > 0
__po_hi_device_id __po_hi_get_device_from_port (const __po_hi_port_t port);
char* __po_hi_get_device_naming (const __po_hi_device_id dev);
#endif
#endif /* __PO_HI_NB_PORTS > 0 */
#endif /* __PO_HI_TRANSPORT__ */
......@@ -103,8 +103,8 @@ ifeq ($(NEED_TRANSPORT), yes)
subprograms.o \
types.o \
request.o \
deployment.o \
marshallers.o \
deployment.o \
naming.o \
main.o
else
......@@ -118,6 +118,7 @@ else
GENERATED_OBJS = \
activity.o \
subprograms.o \
deployment.o \
types.o \
main.o
endif
......
......@@ -12,6 +12,11 @@
#if ((defined __PO_HI_NEED_DRIVER_SPACEWIRE_RASTA) || \
(defined __PO_HI_NEED_DRIVER_SERIAL_RASTA))
#include <rtems/bspIo.h>
#include <pci.h>
#include <rasta.h>
#include <ambapp.h>
#include <pci.h>
#include <rasta.h>
#include <apbuart_rasta.h>
......@@ -20,8 +25,315 @@
#include <po_hi_debug.h>
/* PolyORB-HI-C includes */
#define DBG printk
/* If RASTA_SRAM is defined SRAM will be used, else SDRAM */
/*#define RASTA_SRAM 1*/
#define RASTA_IRQ 5
/* Offset from 0x80000000 (dual bus version) */
#define AHB1_IOAREA_BASE_ADDR 0x80100000
#define APB2_OFFSET 0x200000
#define IRQ_OFFSET 0x200500
#define GRHCAN_OFFSET 0x201000
#define BRM_OFFSET 0x100000
#define SPW_OFFSET 0xa00
#define UART_OFFSET 0x200200
#define GPIO0_OFF 0x200600
#define GPIO1_OFF 0x200700
int __po_hi_c_driver_rasta_common_is_init = 0;
static int bus, dev, fun;
static amba_confarea_type abus;
static struct amba_mmap amba_maps[3];
extern LEON3_IrqCtrl_Regs_Map *irq;
extern LEON_Register_Map *regs;
amba_confarea_type* __po_hi_driver_rasta_common_get_bus ()
{
return &abus;
}
void *uart0_int_arg, *uart1_int_arg;
void *spw0_int_arg, *spw1_int_arg, *spw2_int_arg;
void *grcan_int_arg;
void *brm_int_arg;
extern void (*uart0_int_handler)(int irq, void *arg);
extern void (*uart1_int_handler)(int irq, void *arg);
extern void (*spw0_int_handler)(int irq, void *arg);
extern void (*spw1_int_handler)(int irq, void *arg);
extern void (*spw2_int_handler)(int irq, void *arg);
extern void (*grcan_int_handler)(int irq, void *arg);
extern void (*brm_int_handler)(int irq, void *arg);
static rtems_isr __po_hi_rasta_interrupt_handler (rtems_vector_number v)
{
unsigned int status;
status = irq->ipend;
DBG("Interrupt triggered\n");
if ( (status & GRCAN_IRQ) && grcan_int_handler ) {
grcan_int_handler(GRCAN_IRQNO,grcan_int_arg);
}
if (status & SPW_IRQ) {
if ( (status & SPW0_IRQ) && spw0_int_handler ){
spw0_int_handler(SPW0_IRQNO,spw0_int_arg);
}
if ( (status & SPW1_IRQ) && spw1_int_handler ){
spw1_int_handler(SPW1_IRQNO,spw1_int_arg);
}
if ( (status & SPW2_IRQ) && spw2_int_handler ){
spw2_int_handler(SPW2_IRQNO,spw2_int_arg);
}
}
if ((status & BRM_IRQ) && brm_int_handler ){
brm_int_handler(BRM_IRQNO,brm_int_arg);
}
if ( (status & UART0_IRQ) && uart0_int_handler ) {
uart0_int_handler(UART0_IRQNO,uart0_int_arg);
}
if ( (status & UART1_IRQ) && uart1_int_handler) {
uart1_int_handler(UART1_IRQNO,uart1_int_arg);
}
irq->iclear = status;
}
void __po_hi_rasta_interrrupt_register(void *handler, int irqno, void *arg)
{
DBG("RASTA: Registering irq %d\n",irqno);
if ( irqno == UART0_IRQNO ){
DBG("RASTA: Registering uart0 handler: 0x%x, arg: 0x%x\n",handler,arg);
uart0_int_handler = handler;
uart0_int_arg = arg;
/* unmask interrupt source */
irq->iclear = UART0_IRQ;
irq->mask[0] |= UART0_IRQ;
}
if ( irqno == UART1_IRQNO ){
DBG("RASTA: Registering uart1 handler: 0x%x, arg: 0x%x\n",handler,arg);
uart1_int_handler = handler;
uart1_int_arg = arg;
/* unmask interrupt source */
irq->iclear = UART1_IRQ;
irq->mask[0] |= UART1_IRQ;
}
if ( irqno == SPW0_IRQNO ){
DBG("RASTA: Registering spw0 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw0_int_handler = handler;
spw0_int_arg = arg;
/* unmask interrupt source */
irq->iclear = SPW0_IRQ;
irq->mask[0] |= SPW0_IRQ;
}
if ( irqno == SPW1_IRQNO ){
DBG("RASTA: Registering spw1 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw1_int_handler = handler;
spw1_int_arg = arg;
/* unmask interrupt source */
irq->iclear = SPW1_IRQ;
irq->mask[0] |= SPW1_IRQ;
}
if ( irqno == SPW2_IRQNO ){
DBG("RASTA: Registering spw2 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw2_int_handler = handler;
spw2_int_arg = arg;
/* unmask interrupt source */
irq->iclear = SPW2_IRQ;
irq->mask[0] |= SPW2_IRQ;
}
if ( irqno == GRCAN_IRQNO ){
DBG("RASTA: Registering GRCAN handler: 0x%x, arg: 0x%x\n",handler,arg);
grcan_int_handler = handler;
grcan_int_arg = arg;
/* unmask interrupt source */
irq->iclear = GRCAN_IRQ;
irq->mask[0] |= GRCAN_IRQ;
}
if ( irqno == BRM_IRQNO ){
DBG("RASTA: Registering BRM handler: 0x%x, arg: 0x%x\n",handler,arg);
brm_int_handler = handler;
brm_int_arg = arg;
/* unmask interrupt source */
irq->iclear = BRM_IRQ;
irq->mask[0] |= BRM_IRQ;
}
}
int __po_hi_rasta_get_gpio(amba_confarea_type *abus, int index, struct gpio_reg **regs, int *irq)
{
amba_apb_device dev;
int cores;
if ( !abus )
return -1;
/* Scan PnP info for GPIO port number 'index' */
cores = amba_find_next_apbslv(abus,VENDOR_GAISLER,GAISLER_GPIO,&dev,index);
if ( cores < 1 )
return -1;
if ( regs )
*regs = (struct gpio_reg *)dev.start;
if ( irq )
*irq = dev.irq;
return 0;
}
unsigned int __po_hi_driver_rasta_bar0, __po_hi_driver_rasta_bar1;
int __po_hi_rasta_register(void)
{
unsigned int data;
unsigned int *page0 = NULL;
unsigned int *apb_base = NULL;
int found=0;
DBG("Searching for RASTA board ...");
/* Search PCI vendor/device id. */
if (BSP_pciFindDevice(0x1AC8, 0x0010, 0, &bus, &dev, &fun) == 0) {
found = 1;
}
/* Search old PCI vendor/device id. */
if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) {
found = 1;
}
/* Did we find a RASTA board? */
if ( !found )
return -1;
DBG(" found it (dev/fun: %d/%d).\n", dev, fun);
pci_read_config_dword(bus, dev, fun, 0x10, &__po_hi_driver_rasta_bar0);
pci_read_config_dword(bus, dev, fun, 0x14, &__po_hi_driver_rasta_bar1);
DBG("here1\n", dev, fun);
page0 = (unsigned int *)(__po_hi_driver_rasta_bar0 + 0x400000);
*page0 = 0x80000000; /* Point PAGE0 to start of APB */
apb_base = (unsigned int *)(__po_hi_driver_rasta_bar0+APB2_OFFSET);
/* apb_base[0] = 0x000002ff;
apb_base[1] = 0x8a205260;
apb_base[2] = 0x00184000; */
/* Configure memory controller */
#ifdef RASTA_SRAM
apb_base[0] = 0x000002ff;
apb_base[1] = 0x00001260;
apb_base[2] = 0x000e8000;
#else
apb_base[0] = 0x000002ff;
apb_base[1] = 0x82206000;
apb_base[2] = 0x000e8000;
#endif
/* Set up rasta irq controller */
irq = (LEON3_IrqCtrl_Regs_Map *) (__po_hi_driver_rasta_bar0+IRQ_OFFSET);
irq->iclear = 0xffff;
irq->ilevel = 0;
irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ);
DBG("here2\n", dev, fun);
/* Configure AT697 ioport bit 7 to input pci irq */
regs->PIO_Direction &= ~(1<<7);
regs->PIO_Interrupt |= (0x87<<8); /* level sensitive */
apb_base[0x100] |= 0x40000000; /* Set GRPCI mmap 0x4 */
apb_base[0x104] = 0x40000000; /* 0xA0000000; Point PAGE1 to RAM */
DBG("here21\n");
/* set parity error response */
pci_read_config_dword(bus, dev, fun, 0x4, &data);
pci_write_config_dword(bus, dev, fun, 0x4, data|0x40);
pci_master_enable(bus, dev, fun);
/* install PCI interrupt vector */
/*
*/
/* install interrupt vector */
/*
set_vector(__po_hi_rasta_interrupt_handler,14+0x10, 1);
*/
set_vector(__po_hi_rasta_interrupt_handler, RASTA_IRQ+0x10, 1);
/* Scan AMBA Plug&Play */
/* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
amba_maps[0].size = 0x10000000;
amba_maps[0].cpu_adr = __po_hi_driver_rasta_bar0;
amba_maps[0].remote_amba_adr = 0x80000000;
/* AMBA MAP bar1 (in CPU) ==> 0x40000000(remote amba address) */
amba_maps[1].size = 0x10000000;
amba_maps[1].cpu_adr = __po_hi_driver_rasta_bar1;
amba_maps[1].remote_amba_adr = 0x40000000;
/* Mark end of table */
amba_maps[2].size=0;
amba_maps[2].cpu_adr = 0;
amba_maps[2].remote_amba_adr = 0;
memset(&abus,0,sizeof(abus));
/* Start AMBA PnP scan at first AHB bus */
amba_scan(&abus,__po_hi_driver_rasta_bar0+(AHB1_IOAREA_BASE_ADDR&~0xf0000000),&amba_maps[0]);
/* Find GPIO0 address */
if ( __po_hi_rasta_get_gpio(&abus,0,&gpio0,NULL) ){
printk("Failed to get address for RASTA GPIO0\n\r");
return -1;
}
/* Find GPIO1 address */
if ( __po_hi_rasta_get_gpio(&abus,1,&gpio1,NULL) ){
printk("Failed to get address for RASTA GPIO1\n\r");
return -1;
}
DBG ("Successful init of the RASTA\n");
/* Successfully registered the RASTA board */
return 0;
}
void __po_hi_c_driver_rasta_common_init ()
{
if (__po_hi_c_driver_rasta_common_is_init == 1)
......@@ -32,10 +344,17 @@ void __po_hi_c_driver_rasta_common_init ()
__DEBUGMSG ("[RASTA SERIAL] Init\n");
init_pci();
__DEBUGMSG ("[RASTA SERIAL] Initializing RASTA ...\n");
if ( rasta_register() ){
/*
if (__po_hi_rasta_register() ){
__DEBUGMSG(" ERROR !\n");
return;
}
*/
if (rasta_register() ){
__DEBUGMSG(" ERROR !\n");
return;
}
__DEBUGMSG(" OK !\n");
__po_hi_c_driver_rasta_common_is_init = 1;
......
......@@ -86,9 +86,24 @@ void __po_hi_c_driver_serial_rasta_poller (void)
__po_hi_main_deliver (&__po_hi_c_driver_rasta_serial_request);
}
extern amba_confarea_type* __po_hi_driver_rasta_common_get_bus ();
void __po_hi_rasta_interrrupt_register(void *handler, int irqno, void *arg);
void __po_hi_c_driver_serial_rasta_init (__po_hi_device_id id)
{
__po_hi_c_driver_rasta_common_init ();
/* provide the spacewire driver with AMBA Plug&Play
* info so that it can find the GRSPW cores.
*/
/*
apbuart_rasta_int_reg=__po_hi_rasta_interrrupt_register;
if ( apbuart_rasta_register(__po_hi_driver_rasta_common_get_bus ()) ){
printk("Failed to register RASTA APBUART driver\n\r");
}
*/
po_hi_c_driver_rasta_serial_fd = open (__po_hi_get_device_naming (id), O_RDWR);
if (po_hi_c_driver_rasta_serial_fd < 0)
......
......@@ -30,6 +30,10 @@
#include <fcntl.h>
/* POSIX-style files */
#include <rtems/bspIo.h>
#include <ambapp.h>
#include <pci.h>
#include <rasta.h>
#include <grspw_rasta.h>
......@@ -96,6 +100,13 @@ void __po_hi_c_driver_spacewire_rasta_poller (void)
}
}
extern rtems_isr __po_hi_rasta_interrupt_handler (rtems_vector_number v);
extern unsigned int __po_hi_driver_rasta_bar0, __po_hi_driver_rasta_bar1;
void __po_hi_rasta_interrrupt_register(void *handler, int irqno, void *arg);
extern amba_confarea_type* __po_hi_driver_rasta_common_get_bus ();
void __po_hi_c_driver_spacewire_rasta_init (__po_hi_device_id id)
{
unsigned int node_addr;
......@@ -106,6 +117,17 @@ void __po_hi_c_driver_spacewire_rasta_init (__po_hi_device_id id)
__po_hi_c_driver_rasta_common_init ();
/* provide the spacewire driver with AMBA Plug&Play
* info so that it can find the GRSPW cores.
*/
/*
grspw_rasta_int_reg=__po_hi_rasta_interrrupt_register;
if ( grspw_rasta_register(__po_hi_driver_rasta_common_get_bus (),__po_hi_driver_rasta_bar1) ){
printk("Failed to register RASTA GRSPW driver\n\r");
return;
}
*/
__DEBUGMSG ("[RASTA SPACEWIRE] Open spacewire device ...");
po_hi_c_driver_rasta_spacewire_fd = open (__PO_HI_DRIVER_SPACEWIRE_RASTA_DEVICE, O_RDWR);
......
......@@ -150,7 +150,9 @@ int __po_hi_driver_sockets_send (__po_hi_entity_t from,
}
#endif
#ifdef __PO_HI_NEED_DRIVER_SOCKETSNEW
#if (defined (__PO_HI_NEED_DRIVER_SOCKETSNEW) || \
defined (__PO_HI_NEED_DRIVER_RTEMS_NE2000_SOCKETS))
int __po_hi_driver_sockets_send (__po_hi_task_id task_id,
__po_hi_port_t port)
{
......
/*
* This is a part of PolyORB-HI-C distribution, a minimal
* middleware written for generated code from AADL models.
* You should use it with the Ocarina toolsuite.
*
* For more informations, please visit http://ocarina.enst.fr
*
* Copyright (C) 2010, European Space Agency (ESA).
*/
#ifdef __PO_HI_USE_GPROF
#include <po_hi_debug.h>
......@@ -252,6 +262,7 @@ void _mcount() __attribute__((weak, alias("mcount")));
*/
extern unsigned int _endtext, text_start;
extern int initialize_serial();
extern void end_serial ();
extern void write_serial(uint8_t vector[] , unsigned int dim);
/*
......@@ -308,13 +319,11 @@ static void _mcleanup()
moncontrol(0);
#if (CONFIG_OS_PROFILE_OVER_SERIAL == 1)
ret = initialize_serial();
#endif
if( ret >= 0 )
{
#if (CONFIG_OS_PROFILE_OVER_SERIAL == 1)
write_serial( (uint8_t*)sbuf , (unsigned int)ssiz );
#endif
}
#endif
// fprintf( stderr , "[mcleanup] sbuf 0x%x ssiz %d\n" , (unsigned int)sbuf , (unsigned int)ssiz );
endfrom = s_textsize / (HASHFRACTION * sizeof(*froms));
......@@ -343,6 +352,10 @@ static void _mcleanup()
}
}
}
#if (CONFIG_OS_PROFILE_OVER_SERIAL == 1)
end_serial ();
#endif
}
void monstartup(char *lowpc, char *highpc)
......@@ -537,6 +550,7 @@ overflow:
}
extern rtems_status_code __real_Clock_isr();
extern rtems_status_code Clock_isr();
static uint32_t pc = 0;
rtems_isr __wrap_Clock_isr()
......@@ -565,9 +579,6 @@ static rtems_isr profile_clock_isr(rtems_vector_number vector)
}
#if (CONFIG_OS_PROFILE_OVER_SERIAL == 1)
#include <sys/types.h>
......@@ -597,19 +608,18 @@ static int serialFD = -1;
int initialize_serial()
{
struct termios oldtio, newtio;
__DEBUGMSG ("[RASTA SERIAL] Init\n");
init_pci();
__DEBUGMSG ("[RASTA SERIAL] Initializing RASTA ...\n");
if ( rasta_register() ){
__DEBUGMSG(" ERROR !\n");
return;
return -1;
}
__DEBUGMSG(" OK !\n");
__DEBUGMSG(" OK !\n");
serialFD = open( "/dev/apburasta0" , O_RDWR | O_NOCTTY);
serialFD = open( "/dev/apburasta0" , O_RDWR);
if( serialFD < 0 )
{
#if(SERIAL_VERBOSE_MODE == 1)
......@@ -618,32 +628,21 @@ int initialize_serial()
return -1;
}
tcgetattr(serialFD , &oldtio);
bzero(&newtio, sizeof(newtio));
newtio.c_cflag = BAUDRATE | CRTSCTS | CS8 | CLOCAL | CREAD;
newtio.c_iflag = IGNPAR | ICRNL;
newtio.c_oflag = 0;
newtio.c_lflag = 0;
newtio.c_cc[VTIME] = 0;
newtio.c_cc[VMIN] = 1;
tcflush(serialFD , TCIFLUSH);
tcsetattr(serialFD , TCSANOW , &newtio);
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_SET_BAUDRATE, 57600); /* stream mode */
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_SET_BAUDRATE, 38400); /* stream mode */
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_SET_BLOCKING, APBUART_BLK_RX | APBUART_BLK_TX | APBUART_BLK_FLUSH);
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_SET_TXFIFO_LEN, 64); /* Transmitt buffer 64 chars */
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_SET_RXFIFO_LEN, 256); /* Receive buffer 256 chars */
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_SET_ASCII_MODE, 0); /* Make \n go \n\r or \r\n */
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_CLR_STATS, 0);
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_START, 1);
__PO_HI_DRIVERS_RTEMS_UTILS_IOCTL(serialFD, APBUART_START, 0);
if (tcflush (serialFD, TCIOFLUSH) != 0)
{
__DEBUGMSG("[GPROF] Error when trying to flush\n");
}
#if(SERIAL_VERBOSE_MODE == 1)
printk("Serial init done = %d" , serialFD);
printk("Serial init done (using file descriptor %d)\n" , serialFD);
#endif
return 0;
......@@ -651,7 +650,24 @@ int initialize_serial()
void write_serial(uint8_t vector[] , unsigned int dim)
{
write(serialFD , vector , dim);
int i;
write(serialFD , vector , dim);
/*
for (i = 0 ; i < dim ; i++)
{
write(serialFD , &vector[i] , 1);
}
*/
if (tcflush (serialFD, TCIOFLUSH) != 0)
{
__DEBUGMSG("[GPROF] Error when trying to flush serial port\n");
}
}
void end_serial ()
{
__DEBUGMSG("[GPROF] Analysis results sent\n");
}
#endif /* TIMELINE_USE_SERIAL_CABLE */
......@@ -659,4 +675,3 @@ void write_serial(uint8_t vector[] , unsigned int dim)
#endif
......@@ -23,7 +23,7 @@
#if __PO_HI_NB_PROTECTED > 0
#if defined (RTEMS_POSIX) || defined (POSIX)
#define __USE_UNIX98 1
#include <pthread.h>
/* Declare only needed mutexes according to the generated
......@@ -31,18 +31,60 @@
* represents the needed number of mutexes in the system.
*/
pthread_mutex_t __po_hi_protected_mutexes[__PO_HI_NB_PROTECTED];
pthread_mutex_t __po_hi_protected_mutexes[__PO_HI_NB_PROTECTED];
pthread_mutexattr_t __po_hi_protected_mutexes_attr[__PO_HI_NB_PROTECTED];
extern __po_hi_protected_protocol_t __po_hi_protected_configuration[__PO_HI_NB_PROTECTED];
extern __po_hi_uint8_t __po_hi_protected_priorities[__PO_HI_NB_PROTECTED];
int __po_hi_protected_init ()
{
__po_hi_uint8_t i;
__po_hi_uint8_t prio;
for (i = 0 ; i < __PO_HI_NB_PROTECTED ; i++ )
{
if (pthread_mutex_init (&__po_hi_protected_mutexes[i], NULL) != 0)
if (pthread_mutexattr_init (&__po_hi_protected_mutexes_attr[i]) != 0)
{
__PO_HI_DEBUG_DEBUG ("[PROTECTED] Error while initializing mutex attr\n");
}
if (__po_hi_protected_configuration[i] == __PO_HI_PROTECTED_IPCP)
{
if (pthread_mutexattr_setprotocol (&__po_hi_protected_mutexes_attr[i], PTHREAD_PRIO_PROTECT) != 0)
{
__PO_HI_DEBUG_DEBUG ("[PROTECTED] Error while changing mutex protocol\n");
}
prio = __po_hi_protected_priorities[i];
if (prio == 0)
{
#include <po_hi_task.h>
prio<