Commit 61048977 authored by yoogx's avatar yoogx
Browse files

* Change output of Petri Nets to files instead of standard

          output.

          Update reference output accordingly.
parent 4e12737a
......@@ -8,477 +8,7 @@ robot.aadl:183:05: Warning: actual_processor_binding is not a list while the cor
robot.aadl:183:05: Warning: The value of actual_processor_binding has been converted into a list.
robot.aadl:184:05: Warning: actual_processor_binding is not a list while the corresponding property name at deployment_properties.aadl:14:02 is a list.
robot.aadl:184:05: Warning: The value of actual_processor_binding has been converted into a list.
------------------------------------------
------ Ocarina Petri Nets Generator ------
------------------------------------------
robot.aadl:170:05: warning: CPU1 references a component type
ocarina: Total: 0 error and 1 warning
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~ Timed Petri Nets ~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
net AADL_TO_TPN_GENERATED
tr proc_capteur_droit_th_c_Init_Dispatch [0,w[ proc_capteur_droit_th_c_Halted proc_capteur_gauche_th_c_Halted proc_controle_th_ctrl_droit_Halted proc_controle_th_ctrl_gauche_Halted proc_servomoteur_droit_th_servomoteur_Halted proc_servomoteur_gauche_th_servomoteur_Halted -> proc_capteur_droit_th_c_Wait_For_Dispatch proc_capteur_gauche_th_c_Wait_For_Dispatch proc_controle_th_ctrl_droit_Wait_For_Dispatch proc_controle_th_ctrl_gauche_Wait_For_Dispatch proc_servomoteur_droit_th_servomoteur_Wait_For_Dispatch proc_servomoteur_gauche_th_servomoteur_Wait_For_Dispatch
tr proc_capteur_droit_th_c_Period_Event [110,110] proc_capteur_droit_th_c_Hyperperiod -> proc_capteur_droit_th_c_Clock
pl proc_capteur_droit_th_c_Halted (1)
pl proc_capteur_droit_th_c_Wait_For_Dispatch (0)
pl proc_capteur_droit_th_c_Hyperperiod (1)
pl proc_capteur_droit_th_c_Clock (0)
tr proc_capteur_droit_th_c_Begin [0,w[ CPU1_Processor proc_capteur_droit_th_c_Clock proc_capteur_droit_th_c_Wait_For_Dispatch -> proc_capteur_droit_th_c_Work1
tr proc_capteur_droit_th_c_End [0,w[ proc_capteur_droit_th_c_Work2 -> CPU1_Processor proc_capteur_droit_th_c_evenementproc_capteur_droit_th_c__Store_Port proc_capteur_droit_th_c_Wait_For_Dispatch
tr proc_capteur_droit_th_c_Preemp1 [0,w[ proc_capteur_droit_th_c_Work1 -> proc_capteur_droit_th_c_ContextSwitch CPU1_Processor
tr proc_capteur_droit_th_c_Preemp2 [0,w[ proc_capteur_droit_th_c_ContextSwitch CPU1_Processor -> proc_capteur_droit_th_c_Work2
pl proc_capteur_droit_th_c_Work1 (0)
pl proc_capteur_droit_th_c_Work2 (0)
pl proc_capteur_droit_th_c_ContextSwitch (0)
tr proc_capteur_droit_th_c_evenementproc_capteur_droit_th_c__Pop_Port [0,w[ proc_capteur_droit_th_c_evenementproc_capteur_droit_th_c__Store_Port -> proc_capteur_droit_th_c_evenement_Bus
pl proc_capteur_droit_th_c_evenementproc_capteur_droit_th_c__Store_Port (0)
tr proc_capteur_gauche_th_c_Period_Event [110,110] proc_capteur_gauche_th_c_Hyperperiod -> proc_capteur_gauche_th_c_Clock
pl proc_capteur_gauche_th_c_Halted (1)
pl proc_capteur_gauche_th_c_Wait_For_Dispatch (0)
pl proc_capteur_gauche_th_c_Hyperperiod (1)
pl proc_capteur_gauche_th_c_Clock (0)
tr proc_capteur_gauche_th_c_Begin [0,w[ CPU1_Processor proc_capteur_gauche_th_c_Clock proc_capteur_gauche_th_c_Wait_For_Dispatch -> proc_capteur_gauche_th_c_Work1
tr proc_capteur_gauche_th_c_End [0,w[ proc_capteur_gauche_th_c_Work2 -> CPU1_Processor proc_capteur_gauche_th_c_evenementproc_capteur_gauche_th_c__Store_Port proc_capteur_gauche_th_c_Wait_For_Dispatch
tr proc_capteur_gauche_th_c_Preemp1 [0,w[ proc_capteur_gauche_th_c_Work1 -> proc_capteur_gauche_th_c_ContextSwitch CPU1_Processor
tr proc_capteur_gauche_th_c_Preemp2 [0,w[ proc_capteur_gauche_th_c_ContextSwitch CPU1_Processor -> proc_capteur_gauche_th_c_Work2
pl proc_capteur_gauche_th_c_Work1 (0)
pl proc_capteur_gauche_th_c_Work2 (0)
pl proc_capteur_gauche_th_c_ContextSwitch (0)
tr proc_capteur_gauche_th_c_evenementproc_capteur_gauche_th_c__Pop_Port [0,w[ proc_capteur_gauche_th_c_evenementproc_capteur_gauche_th_c__Store_Port -> proc_capteur_gauche_th_c_evenement_Bus
pl proc_capteur_gauche_th_c_evenementproc_capteur_gauche_th_c__Store_Port (0)
tr proc_controle_th_ctrl_droit_Period_Event [110,110] proc_controle_th_ctrl_droit_Hyperperiod -> proc_controle_th_ctrl_droit_Clock
pl proc_controle_th_ctrl_droit_Halted (1)
pl proc_controle_th_ctrl_droit_Wait_For_Dispatch (0)
pl proc_controle_th_ctrl_droit_Hyperperiod (1)
pl proc_controle_th_ctrl_droit_Clock (0)
tr proc_controle_th_ctrl_droit_Begin [0,w[ CPU1_Processor proc_controle_th_ctrl_droit_info_capteurproc_controle_th_ctrl_droit__Store_Port proc_controle_th_ctrl_droit_Wait_For_Dispatch proc_controle_th_ctrl_droit_Clock -> proc_controle_th_ctrl_droit_Work1
tr proc_controle_th_ctrl_droit_End [0,w[ proc_controle_th_ctrl_droit_Work2 -> CPU1_Processor proc_controle_th_ctrl_droit_comm_servoproc_controle_th_ctrl_droit__Store_Port proc_controle_th_ctrl_droit_Wait_For_Dispatch
tr proc_controle_th_ctrl_droit_Preemp1 [0,w[ proc_controle_th_ctrl_droit_Work1 -> proc_controle_th_ctrl_droit_ContextSwitch CPU1_Processor
tr proc_controle_th_ctrl_droit_Preemp2 [0,w[ proc_controle_th_ctrl_droit_ContextSwitch CPU1_Processor -> proc_controle_th_ctrl_droit_Work2
pl proc_controle_th_ctrl_droit_Work1 (0)
pl proc_controle_th_ctrl_droit_Work2 (0)
pl proc_controle_th_ctrl_droit_ContextSwitch (0)
tr proc_controle_th_ctrl_droit_info_capteurproc_controle_th_ctrl_droit__Push_Port [0,w[ proc_capteur_droit_th_c_evenement_Bus -> proc_controle_th_ctrl_droit_info_capteurproc_controle_th_ctrl_droit__Store_Port
pl proc_controle_th_ctrl_droit_info_capteurproc_controle_th_ctrl_droit__Store_Port (0)
tr proc_controle_th_ctrl_droit_comm_servoproc_controle_th_ctrl_droit__Pop_Port [0,w[ proc_controle_th_ctrl_droit_comm_servoproc_controle_th_ctrl_droit__Store_Port -> proc_controle_th_ctrl_droit_comm_servo_Bus
pl proc_controle_th_ctrl_droit_comm_servoproc_controle_th_ctrl_droit__Store_Port (0)
tr proc_controle_th_ctrl_gauche_Period_Event [110,110] proc_controle_th_ctrl_gauche_Hyperperiod -> proc_controle_th_ctrl_gauche_Clock
pl proc_controle_th_ctrl_gauche_Halted (1)
pl proc_controle_th_ctrl_gauche_Wait_For_Dispatch (0)
pl proc_controle_th_ctrl_gauche_Hyperperiod (1)
pl proc_controle_th_ctrl_gauche_Clock (0)
tr proc_controle_th_ctrl_gauche_Begin [0,w[ CPU1_Processor proc_controle_th_ctrl_gauche_info_capteurproc_controle_th_ctrl_gauche__Store_Port proc_controle_th_ctrl_gauche_Wait_For_Dispatch proc_controle_th_ctrl_gauche_Clock -> proc_controle_th_ctrl_gauche_Work1
tr proc_controle_th_ctrl_gauche_End [0,w[ proc_controle_th_ctrl_gauche_Work2 -> CPU1_Processor proc_controle_th_ctrl_gauche_comm_servoproc_controle_th_ctrl_gauche__Store_Port proc_controle_th_ctrl_gauche_Wait_For_Dispatch
tr proc_controle_th_ctrl_gauche_Preemp1 [0,w[ proc_controle_th_ctrl_gauche_Work1 -> proc_controle_th_ctrl_gauche_ContextSwitch CPU1_Processor
tr proc_controle_th_ctrl_gauche_Preemp2 [0,w[ proc_controle_th_ctrl_gauche_ContextSwitch CPU1_Processor -> proc_controle_th_ctrl_gauche_Work2
pl proc_controle_th_ctrl_gauche_Work1 (0)
pl proc_controle_th_ctrl_gauche_Work2 (0)
pl proc_controle_th_ctrl_gauche_ContextSwitch (0)
tr proc_controle_th_ctrl_gauche_info_capteurproc_controle_th_ctrl_gauche__Push_Port [0,w[ proc_capteur_gauche_th_c_evenement_Bus -> proc_controle_th_ctrl_gauche_info_capteurproc_controle_th_ctrl_gauche__Store_Port
pl proc_controle_th_ctrl_gauche_info_capteurproc_controle_th_ctrl_gauche__Store_Port (0)
tr proc_controle_th_ctrl_gauche_comm_servoproc_controle_th_ctrl_gauche__Pop_Port [0,w[ proc_controle_th_ctrl_gauche_comm_servoproc_controle_th_ctrl_gauche__Store_Port -> proc_controle_th_ctrl_gauche_comm_servo_Bus
pl proc_controle_th_ctrl_gauche_comm_servoproc_controle_th_ctrl_gauche__Store_Port (0)
pl proc_servomoteur_droit_th_servomoteur_Halted (1)
pl proc_servomoteur_droit_th_servomoteur_Wait_For_Dispatch (0)
tr proc_servomoteur_droit_th_servomoteur_Begin [0,w[ CPU1_Processor proc_servomoteur_droit_th_servomoteur_ordreproc_servomoteur_droit_th_servomoteur__Store_Port proc_servomoteur_droit_th_servomoteur_Wait_For_Dispatch -> proc_servomoteur_droit_th_servomoteur_Work1
tr proc_servomoteur_droit_th_servomoteur_End [0,w[ proc_servomoteur_droit_th_servomoteur_Work2 -> CPU1_Processor proc_servomoteur_droit_th_servomoteur_Wait_For_Dispatch
tr proc_servomoteur_droit_th_servomoteur_Preemp1 [0,w[ proc_servomoteur_droit_th_servomoteur_Work1 -> proc_servomoteur_droit_th_servomoteur_ContextSwitch CPU1_Processor
tr proc_servomoteur_droit_th_servomoteur_Preemp2 [0,w[ proc_servomoteur_droit_th_servomoteur_ContextSwitch CPU1_Processor -> proc_servomoteur_droit_th_servomoteur_Work2
pl proc_servomoteur_droit_th_servomoteur_Work1 (0)
pl proc_servomoteur_droit_th_servomoteur_Work2 (0)
pl proc_servomoteur_droit_th_servomoteur_ContextSwitch (0)
tr proc_servomoteur_droit_th_servomoteur_ordreproc_servomoteur_droit_th_servomoteur__Push_Port [0,w[ proc_controle_th_ctrl_droit_comm_servo_Bus -> proc_servomoteur_droit_th_servomoteur_ordreproc_servomoteur_droit_th_servomoteur__Store_Port
pl proc_servomoteur_droit_th_servomoteur_ordreproc_servomoteur_droit_th_servomoteur__Store_Port (0)
pl proc_servomoteur_gauche_th_servomoteur_Halted (1)
pl proc_servomoteur_gauche_th_servomoteur_Wait_For_Dispatch (0)
tr proc_servomoteur_gauche_th_servomoteur_Begin [0,w[ CPU1_Processor proc_servomoteur_gauche_th_servomoteur_ordreproc_servomoteur_gauche_th_servomoteur__Store_Port proc_servomoteur_gauche_th_servomoteur_Wait_For_Dispatch -> proc_servomoteur_gauche_th_servomoteur_Work1
tr proc_servomoteur_gauche_th_servomoteur_End [0,w[ proc_servomoteur_gauche_th_servomoteur_Work2 -> CPU1_Processor proc_servomoteur_gauche_th_servomoteur_Wait_For_Dispatch
tr proc_servomoteur_gauche_th_servomoteur_Preemp1 [0,w[ proc_servomoteur_gauche_th_servomoteur_Work1 -> proc_servomoteur_gauche_th_servomoteur_ContextSwitch CPU1_Processor
tr proc_servomoteur_gauche_th_servomoteur_Preemp2 [0,w[ proc_servomoteur_gauche_th_servomoteur_ContextSwitch CPU1_Processor -> proc_servomoteur_gauche_th_servomoteur_Work2
pl proc_servomoteur_gauche_th_servomoteur_Work1 (0)
pl proc_servomoteur_gauche_th_servomoteur_Work2 (0)
pl proc_servomoteur_gauche_th_servomoteur_ContextSwitch (0)
tr proc_servomoteur_gauche_th_servomoteur_ordreproc_servomoteur_gauche_th_servomoteur__Push_Port [0,w[ proc_controle_th_ctrl_gauche_comm_servo_Bus -> proc_servomoteur_gauche_th_servomoteur_ordreproc_servomoteur_gauche_th_servomoteur__Store_Port
pl proc_servomoteur_gauche_th_servomoteur_ordreproc_servomoteur_gauche_th_servomoteur__Store_Port (0)
pl CPU1_Processor (1)
pl proc_capteur_droit_th_c_evenement_Bus (0)
pl proc_capteur_gauche_th_c_evenement_Bus (0)
pl proc_controle_th_ctrl_droit_comm_servo_Bus (0)
pl proc_controle_th_ctrl_gauche_comm_servo_Bus (0)
robot.aadl:170:05: warning: CPU1 references a component type
ocarina: Total: 0 error and 1 warning
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~ Colored Petri Nets ~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CN(3:net,1)
CM(11:declaration,1,1,1,5:Class)
CM(11:declaration,1,2,1,20:Threads_Ids is 0..6;)
CM(11:declaration,1,3,1,19:Msg_Types is [msg];)
CM(11:declaration,1,4,1,6:Domain)
CM(11:declaration,1,5,1,32:mess is <Threads_Ids,Msg_Types>;)
CM(11:declaration,1,6,1,3:Var)
CM(11:declaration,1,7,1,57: x, y, x584, x646, x720, x780, x892, x954 in Threads_Ids;)
CM(11:declaration,1,8,1,16: m in Msg_Types;)
CN(10:transition,1123)
CT(4:name,1123,37:proc_capteur_droit_th_c_Init_Dispatch)
CA(3:arc,1128,1115,1123)
CT(9:valuation,1128,6:<x584>)
CA(3:arc,2597,1294,1123)
CT(9:valuation,2597,6:<x646>)
CA(3:arc,2607,1473,1123)
CT(9:valuation,2607,6:<x720>)
CA(3:arc,2637,1751,1123)
CT(9:valuation,2637,6:<x780>)
CA(3:arc,2667,2029,1123)
CT(9:valuation,2667,6:<x892>)
CA(3:arc,2697,2259,1123)
CT(9:valuation,2697,6:<x954>)
CA(3:arc,1133,1123,1119)
CT(9:valuation,1133,6:<x584>)
CA(3:arc,2602,1123,1298)
CT(9:valuation,2602,6:<x646>)
CA(3:arc,2612,1123,1477)
CT(9:valuation,2612,6:<x720>)
CA(3:arc,2642,1123,1755)
CT(9:valuation,2642,6:<x780>)
CA(3:arc,2672,1123,2033)
CT(9:valuation,2672,6:<x892>)
CA(3:arc,2702,1123,2263)
CT(9:valuation,2702,6:<x954>)
CN(5:place,1115)
CT(4:name,1115,30:proc_capteur_droit_th_c_Halted)
CT(6:domain,1115,11:Threads_Ids)
CT(7:marking,1115,3:<1>)
CN(5:place,1119)
CT(4:name,1119,41:proc_capteur_droit_th_c_Wait_For_Dispatch)
CT(6:domain,1119,11:Threads_Ids)
CN(10:transition,1203)
CT(4:name,1203,29:proc_capteur_droit_th_c_Begin)
CA(3:arc,2481,1119,1203)
CT(9:valuation,2481,3:<x>)
CA(3:arc,1235,1203,1223)
CT(9:valuation,1235,3:<x>)
CN(10:transition,1213)
CT(4:name,1213,31:proc_capteur_droit_th_c_Preemp1)
CA(3:arc,1240,1223,1213)
CT(9:valuation,1240,3:<x>)
CA(3:arc,1245,1213,1231)
CT(9:valuation,1245,3:<x>)
CN(10:transition,1218)
CT(4:name,1218,31:proc_capteur_droit_th_c_Preemp2)
CA(3:arc,1250,1231,1218)
CT(9:valuation,1250,3:<x>)
CA(3:arc,1255,1218,1227)
CT(9:valuation,1255,3:<x>)
CN(5:place,1223)
CT(4:name,1223,29:proc_capteur_droit_th_c_Work1)
CT(6:domain,1223,11:Threads_Ids)
CN(5:place,1227)
CT(4:name,1227,29:proc_capteur_droit_th_c_Work2)
CT(6:domain,1227,11:Threads_Ids)
CN(5:place,1231)
CT(4:name,1231,37:proc_capteur_droit_th_c_ContextSwitch)
CT(6:domain,1231,11:Threads_Ids)
CN(5:place,1294)
CT(4:name,1294,31:proc_capteur_gauche_th_c_Halted)
CT(6:domain,1294,11:Threads_Ids)
CT(7:marking,1294,3:<2>)
CN(5:place,1298)
CT(4:name,1298,42:proc_capteur_gauche_th_c_Wait_For_Dispatch)
CT(6:domain,1298,11:Threads_Ids)
CN(10:transition,1382)
CT(4:name,1382,30:proc_capteur_gauche_th_c_Begin)
CA(3:arc,2495,1298,1382)
CT(9:valuation,2495,3:<x>)
CA(3:arc,1414,1382,1402)
CT(9:valuation,1414,3:<x>)
CN(10:transition,1392)
CT(4:name,1392,32:proc_capteur_gauche_th_c_Preemp1)
CA(3:arc,1419,1402,1392)
CT(9:valuation,1419,3:<x>)
CA(3:arc,1424,1392,1410)
CT(9:valuation,1424,3:<x>)
CN(10:transition,1397)
CT(4:name,1397,32:proc_capteur_gauche_th_c_Preemp2)
CA(3:arc,1429,1410,1397)
CT(9:valuation,1429,3:<x>)
CA(3:arc,1434,1397,1406)
CT(9:valuation,1434,3:<x>)
CN(5:place,1402)
CT(4:name,1402,30:proc_capteur_gauche_th_c_Work1)
CT(6:domain,1402,11:Threads_Ids)
CN(5:place,1406)
CT(4:name,1406,30:proc_capteur_gauche_th_c_Work2)
CT(6:domain,1406,11:Threads_Ids)
CN(5:place,1410)
CT(4:name,1410,38:proc_capteur_gauche_th_c_ContextSwitch)
CT(6:domain,1410,11:Threads_Ids)
CN(5:place,1473)
CT(4:name,1473,34:proc_controle_th_ctrl_droit_Halted)
CT(6:domain,1473,11:Threads_Ids)
CT(7:marking,1473,3:<3>)
CN(5:place,1477)
CT(4:name,1477,45:proc_controle_th_ctrl_droit_Wait_For_Dispatch)
CT(6:domain,1477,11:Threads_Ids)
CN(10:transition,1594)
CT(4:name,1594,33:proc_controle_th_ctrl_droit_Begin)
CA(3:arc,2509,1682,1594)
CT(9:valuation,2509,5:<y,m>)
CA(3:arc,2519,1477,1594)
CT(9:valuation,2519,3:<x>)
CA(3:arc,1626,1594,1614)
CT(9:valuation,1626,3:<x>)
CA(3:arc,2514,1594,1686)
CT(9:valuation,2514,1:1)
CN(10:transition,1604)
CT(4:name,1604,35:proc_controle_th_ctrl_droit_Preemp1)
CA(3:arc,1631,1614,1604)
CT(9:valuation,1631,3:<x>)
CA(3:arc,1636,1604,1622)
CT(9:valuation,1636,3:<x>)
CN(10:transition,1609)
CT(4:name,1609,35:proc_controle_th_ctrl_droit_Preemp2)
CA(3:arc,1641,1622,1609)
CT(9:valuation,1641,3:<x>)
CA(3:arc,1646,1609,1618)
CT(9:valuation,1646,3:<x>)
CN(5:place,1614)
CT(4:name,1614,33:proc_controle_th_ctrl_droit_Work1)
CT(6:domain,1614,11:Threads_Ids)
CN(5:place,1618)
CT(4:name,1618,33:proc_controle_th_ctrl_droit_Work2)
CT(6:domain,1618,11:Threads_Ids)
CN(5:place,1622)
CT(4:name,1622,41:proc_controle_th_ctrl_droit_ContextSwitch)
CT(6:domain,1622,11:Threads_Ids)
CN(10:transition,1667)
CT(4:name,1667,77:proc_controle_th_ctrl_droit_info_capteurproc_controle_th_ctrl_droit_Push_Port)
CA(3:arc,1723,1686,1667)
CT(9:valuation,1723,1:1)
CA(3:arc,2617,1227,1667)
CT(9:valuation,2617,3:<x>)
CA(3:arc,1690,1667,1682)
CT(9:valuation,1690,7:<x,msg>)
CA(3:arc,2622,1667,1119)
CT(9:valuation,2622,3:<x>)
CN(10:transition,1677)
CT(4:name,1677,84:proc_controle_th_ctrl_droit_info_capteurproc_controle_th_ctrl_droit__DropOldest_Port)
CA(3:arc,1704,1682,1677)
CT(9:valuation,1704,5:<y,m>)
CA(3:arc,2627,1227,1677)
CT(9:valuation,2627,3:<x>)
CA(3:arc,1711,1677,1682)
CT(9:valuation,1711,7:<x,msg>)
CA(3:arc,2632,1677,1119)
CT(9:valuation,2632,3:<x>)
CN(5:place,1682)
CT(4:name,1682,78:proc_controle_th_ctrl_droit_info_capteurproc_controle_th_ctrl_droit__Slot_Port)
CT(6:domain,1682,4:mess)
CN(5:place,1686)
CT(4:name,1686,79:proc_controle_th_ctrl_droit_info_capteurproc_controle_th_ctrl_droit__Empty_Port)
CT(7:marking,1686,1:1)
CN(5:place,1751)
CT(4:name,1751,35:proc_controle_th_ctrl_gauche_Halted)
CT(6:domain,1751,11:Threads_Ids)
CT(7:marking,1751,3:<4>)
CN(5:place,1755)
CT(4:name,1755,46:proc_controle_th_ctrl_gauche_Wait_For_Dispatch)
CT(6:domain,1755,11:Threads_Ids)
CN(10:transition,1872)
CT(4:name,1872,34:proc_controle_th_ctrl_gauche_Begin)
CA(3:arc,2533,1960,1872)
CT(9:valuation,2533,5:<y,m>)
CA(3:arc,2543,1755,1872)
CT(9:valuation,2543,3:<x>)
CA(3:arc,1904,1872,1892)
CT(9:valuation,1904,3:<x>)
CA(3:arc,2538,1872,1964)
CT(9:valuation,2538,1:1)
CN(10:transition,1882)
CT(4:name,1882,36:proc_controle_th_ctrl_gauche_Preemp1)
CA(3:arc,1909,1892,1882)
CT(9:valuation,1909,3:<x>)
CA(3:arc,1914,1882,1900)
CT(9:valuation,1914,3:<x>)
CN(10:transition,1887)
CT(4:name,1887,36:proc_controle_th_ctrl_gauche_Preemp2)
CA(3:arc,1919,1900,1887)
CT(9:valuation,1919,3:<x>)
CA(3:arc,1924,1887,1896)
CT(9:valuation,1924,3:<x>)
CN(5:place,1892)
CT(4:name,1892,34:proc_controle_th_ctrl_gauche_Work1)
CT(6:domain,1892,11:Threads_Ids)
CN(5:place,1896)
CT(4:name,1896,34:proc_controle_th_ctrl_gauche_Work2)
CT(6:domain,1896,11:Threads_Ids)
CN(5:place,1900)
CT(4:name,1900,42:proc_controle_th_ctrl_gauche_ContextSwitch)
CT(6:domain,1900,11:Threads_Ids)
CN(10:transition,1945)
CT(4:name,1945,79:proc_controle_th_ctrl_gauche_info_capteurproc_controle_th_ctrl_gauche_Push_Port)
CA(3:arc,2001,1964,1945)
CT(9:valuation,2001,1:1)
CA(3:arc,2647,1406,1945)
CT(9:valuation,2647,3:<x>)
CA(3:arc,1968,1945,1960)
CT(9:valuation,1968,7:<x,msg>)
CA(3:arc,2652,1945,1298)
CT(9:valuation,2652,3:<x>)
CN(10:transition,1955)
CT(4:name,1955,86:proc_controle_th_ctrl_gauche_info_capteurproc_controle_th_ctrl_gauche__DropOldest_Port)
CA(3:arc,1982,1960,1955)
CT(9:valuation,1982,5:<y,m>)
CA(3:arc,2657,1406,1955)
CT(9:valuation,2657,3:<x>)
CA(3:arc,1989,1955,1960)
CT(9:valuation,1989,7:<x,msg>)
CA(3:arc,2662,1955,1298)
CT(9:valuation,2662,3:<x>)
CN(5:place,1960)
CT(4:name,1960,80:proc_controle_th_ctrl_gauche_info_capteurproc_controle_th_ctrl_gauche__Slot_Port)
CT(6:domain,1960,4:mess)
CN(5:place,1964)
CT(4:name,1964,81:proc_controle_th_ctrl_gauche_info_capteurproc_controle_th_ctrl_gauche__Empty_Port)
CT(7:marking,1964,1:1)
CN(5:place,2029)
CT(4:name,2029,44:proc_servomoteur_droit_th_servomoteur_Halted)
CT(6:domain,2029,11:Threads_Ids)
CT(7:marking,2029,3:<5>)
CN(5:place,2033)
CT(4:name,2033,55:proc_servomoteur_droit_th_servomoteur_Wait_For_Dispatch)
CT(6:domain,2033,11:Threads_Ids)
CN(10:transition,2117)
CT(4:name,2117,43:proc_servomoteur_droit_th_servomoteur_Begin)
CA(3:arc,2557,2205,2117)
CT(9:valuation,2557,5:<y,m>)
CA(3:arc,2567,2033,2117)
CT(9:valuation,2567,3:<x>)
CA(3:arc,2149,2117,2137)
CT(9:valuation,2149,3:<x>)
CA(3:arc,2562,2117,2209)
CT(9:valuation,2562,1:1)
CN(10:transition,2122)
CT(4:name,2122,41:proc_servomoteur_droit_th_servomoteur_End)
CA(3:arc,2174,2141,2122)
CT(9:valuation,2174,3:<x>)
CA(3:arc,2572,2122,2033)
CT(9:valuation,2572,3:<x>)
CN(10:transition,2127)
CT(4:name,2127,45:proc_servomoteur_droit_th_servomoteur_Preemp1)
CA(3:arc,2154,2137,2127)
CT(9:valuation,2154,3:<x>)
CA(3:arc,2159,2127,2145)
CT(9:valuation,2159,3:<x>)
CN(10:transition,2132)
CT(4:name,2132,45:proc_servomoteur_droit_th_servomoteur_Preemp2)
CA(3:arc,2164,2145,2132)
CT(9:valuation,2164,3:<x>)
CA(3:arc,2169,2132,2141)
CT(9:valuation,2169,3:<x>)
CN(5:place,2137)
CT(4:name,2137,43:proc_servomoteur_droit_th_servomoteur_Work1)
CT(6:domain,2137,11:Threads_Ids)
CN(5:place,2141)
CT(4:name,2141,43:proc_servomoteur_droit_th_servomoteur_Work2)
CT(6:domain,2141,11:Threads_Ids)
CN(5:place,2145)
CT(4:name,2145,51:proc_servomoteur_droit_th_servomoteur_ContextSwitch)
CT(6:domain,2145,11:Threads_Ids)
CN(10:transition,2190)
CT(4:name,2190,90:proc_servomoteur_droit_th_servomoteur_ordreproc_servomoteur_droit_th_servomoteur_Push_Port)
CA(3:arc,2246,2209,2190)
CT(9:valuation,2246,1:1)
CA(3:arc,2677,1618,2190)
CT(9:valuation,2677,3:<x>)
CA(3:arc,2213,2190,2205)
CT(9:valuation,2213,7:<x,msg>)
CA(3:arc,2682,2190,1477)
CT(9:valuation,2682,3:<x>)
CN(10:transition,2200)
CT(4:name,2200,97:proc_servomoteur_droit_th_servomoteur_ordreproc_servomoteur_droit_th_servomoteur__DropOldest_Port)
CA(3:arc,2227,2205,2200)
CT(9:valuation,2227,5:<y,m>)
CA(3:arc,2687,1618,2200)
CT(9:valuation,2687,3:<x>)
CA(3:arc,2234,2200,2205)
CT(9:valuation,2234,7:<x,msg>)
CA(3:arc,2692,2200,1477)
CT(9:valuation,2692,3:<x>)
CN(5:place,2205)
CT(4:name,2205,91:proc_servomoteur_droit_th_servomoteur_ordreproc_servomoteur_droit_th_servomoteur__Slot_Port)
CT(6:domain,2205,4:mess)
CN(5:place,2209)
CT(4:name,2209,92:proc_servomoteur_droit_th_servomoteur_ordreproc_servomoteur_droit_th_servomoteur__Empty_Port)
CT(7:marking,2209,1:1)
CN(5:place,2259)
CT(4:name,2259,45:proc_servomoteur_gauche_th_servomoteur_Halted)
CT(6:domain,2259,11:Threads_Ids)
CT(7:marking,2259,3:<6>)
CN(5:place,2263)
CT(4:name,2263,56:proc_servomoteur_gauche_th_servomoteur_Wait_For_Dispatch)
CT(6:domain,2263,11:Threads_Ids)
CN(10:transition,2347)
CT(4:name,2347,44:proc_servomoteur_gauche_th_servomoteur_Begin)
CA(3:arc,2577,2435,2347)
CT(9:valuation,2577,5:<y,m>)
CA(3:arc,2587,2263,2347)
CT(9:valuation,2587,3:<x>)
CA(3:arc,2379,2347,2367)
CT(9:valuation,2379,3:<x>)
CA(3:arc,2582,2347,2439)
CT(9:valuation,2582,1:1)
CN(10:transition,2352)
CT(4:name,2352,42:proc_servomoteur_gauche_th_servomoteur_End)
CA(3:arc,2404,2371,2352)
CT(9:valuation,2404,3:<x>)
CA(3:arc,2592,2352,2263)
CT(9:valuation,2592,3:<x>)
CN(10:transition,2357)
CT(4:name,2357,46:proc_servomoteur_gauche_th_servomoteur_Preemp1)
CA(3:arc,2384,2367,2357)
CT(9:valuation,2384,3:<x>)
CA(3:arc,2389,2357,2375)
CT(9:valuation,2389,3:<x>)
CN(10:transition,2362)
CT(4:name,2362,46:proc_servomoteur_gauche_th_servomoteur_Preemp2)
CA(3:arc,2394,2375,2362)
CT(9:valuation,2394,3:<x>)
CA(3:arc,2399,2362,2371)
CT(9:valuation,2399,3:<x>)
CN(5:place,2367)
CT(4:name,2367,44:proc_servomoteur_gauche_th_servomoteur_Work1)
CT(6:domain,2367,11:Threads_Ids)
CN(5:place,2371)
CT(4:name,2371,44:proc_servomoteur_gauche_th_servomoteur_Work2)
CT(6:domain,2371,11:Threads_Ids)
CN(5:place,2375)
CT(4:name,2375,52:proc_servomoteur_gauche_th_servomoteur_ContextSwitch)
CT(6:domain,2375,11:Threads_Ids)
CN(10:transition,2420)
CT(4:name,2420,92:proc_servomoteur_gauche_th_servomoteur_ordreproc_servomoteur_gauche_th_servomoteur_Push_Port)
CA(3:arc,2476,2439,2420)
CT(9:valuation,2476,1:1)
CA(3:arc,2707,1896,2420)
CT(9:valuation,2707,3:<x>)
CA(3:arc,2443,2420,2435)
CT(9:valuation,2443,7:<x,msg>)
CA(3:arc,2712,2420,1755)
CT(9:valuation,2712,3:<x>)
CN(10:transition,2430)
CT(4:name,2430,99:proc_servomoteur_gauche_th_servomoteur_ordreproc_servomoteur_gauche_th_servomoteur__DropOldest_Port)
CA(3:arc,2457,2435,2430)
CT(9:valuation,2457,5:<y,m>)
CA(3:arc,2717,1896,2430)
CT(9:valuation,2717,3:<x>)
CA(3:arc,2464,2430,2435)
CT(9:valuation,2464,7:<x,msg>)
CA(3:arc,2722,2430,1755)
CT(9:valuation,2722,3:<x>)
CN(5:place,2435)
CT(4:name,2435,93:proc_servomoteur_gauche_th_servomoteur_ordreproc_servomoteur_gauche_th_servomoteur__Slot_Port)
CT(6:domain,2435,4:mess)
CN(5:place,2439)
CT(4:name,2439,94:proc_servomoteur_gauche_th_servomoteur_ordreproc_servomoteur_gauche_th_servomoteur__Empty_Port)
CT(7:marking,2439,1:1)
......@@ -31,6 +31,8 @@
-- --
------------------------------------------------------------------------------
with GNAT.OS_Lib; use GNAT.OS_Lib;
with Namet;
with Ocarina.Backends.Expander;
......@@ -69,18 +71,9 @@ package body Ocarina.Backends.PN is
-------------------
procedure Generate_TINA (AADL_Root : Types.Node_Id) is
Pn_Generated, Instance_Root : Node_Id;
pragma Warnings (Off, Pn_Generated);
PN_Generated, Instance_Root : Node_Id;
begin
Write_Line ("------------------------------------------");
Write_Line ("------ Ocarina Petri Nets Generator ------");
Write_Line ("------------------------------------------");
Write_Line (" ");
-----------
-- work for TPN generation
-- Instantiate the AADL tree
Instance_Root := Instantiate_Model (AADL_Root);
......@@ -89,20 +82,19 @@ package body Ocarina.Backends.PN is
Expand (Instance_Root);
if Instance_Root /= No_Node then
Pn_Generated := Process_Architecture_Instance (Instance_Root, 1);
else
Pn_Generated := No_Node;
end if;
if Present (Instance_Root) then
-- Generate Petri Net
if Pn_Generated /= No_Node then
PN_Generated := Process_Architecture_Instance (Instance_Root, 1);
-- Set TINA printers
Set_Printers (OPFT.Print_Place'Access,
OPFT.Print_Trans'Access,
OPFT.Print_Formalism_Information'Access);
Write_Line ("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~");
Write_Line ("~~~~~~~~~~~ Timed Petri Nets ~~~~~~~~~~~");
Write_Line ("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~");
Print_Pn_Generated (Pn_Generated);
Set_Output (Create_File ("model.nd", Binary));
Print_PN_Generated (PN_Generated);
Set_Standard_Error;
end if;
end Generate_TINA;
......@@ -111,13 +103,9 @@ package body Ocarina.Backends.PN is
-------------------
procedure Generate_CAMI (AADL_Root : Types.Node_Id) is
Pn_Generated, Instance_Root : Node_Id;
pragma Warnings (Off, Pn_Generated);
PN_Generated, Instance_Root : Node_Id;
begin
-----------
-- work for CPN generation
-- Instantiate the AADL tree
Instance_Root := Instantiate_Model (AADL_Root);
......@@ -127,19 +115,13 @@ package body Ocarina.Backends.PN is
Expand (Instance_Root);
if Instance_Root /= No_Node then
Pn_Generated := Process_Architecture_Instance (Instance_Root, 0);
else
Pn_Generated := No_Node;
end if;
if Pn_Generated /= No_Node then
PN_Generated := Process_Architecture_Instance (Instance_Root, 0);
Set_Printers (OPFC.Print_Place'Access,
OPFC.Print_Trans'Access,
OPFC.Print_Formalism_Information'Access);
Write_Line ("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~");
Write_Line ("~~~~~~~~~~~ Colored Petri Nets ~~~~~~~~~~~");
Write_Line ("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~");
Print_Pn_Generated (Pn_Generated);
Set_Output (Create_File ("model.cami", Binary));
Print_PN_Generated (PN_Generated);
Set_Standard_Error;
end if;
end Generate_CAMI;
......
------------------------------------------
------ Ocarina Petri Nets Generator ------
------------------------------------------
test.aadl:12:03: warning: CPU references a component type
ocarina: Total: 0 error and 1 warning
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~ Timed Petri Nets ~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
net AADL_TO_TPN_GENERATED
tr pr_A_Producer_Init_Dispatch [0,w[ pr_A_Producer_Halted pr_A_Result_Consumer_Halted pr_B_Consumer_Halted pr_B_Result_Producer_Halted -> pr_A_Producer_Wait_For_Dispatch pr_A_Result_Consumer_Wait_For_Dispatch pr_B_Consumer_Wait_For_Dispatch pr_B_Result_Producer_Wait_For_Dispatch
tr pr_A_Producer_Period_Event [20,20] pr_A_Producer_Hyperperiod -> pr_A_Producer_Clock
pl pr_A_Producer_Halted (1)
pl pr_A_Producer_Wait_For_Dispatch (0)
pl pr_A_Producer_Hyperperiod (1)
pl pr_A_Producer_Clock (0)
tr pr_A_Producer_Begin [0,w[ CPU_Processor pr_A_Producer_Clock pr_A_Producer_Wait_For_Dispatch -> pr_A_Producer_Work1
tr pr_A_Producer_End [0,w[ pr_A_Producer_Work2 -> CPU_Processor pr_A_Producer_Data_Sourcepr_A_Producer__Store_Port pr_A_Producer_Wait_For_Dispatch
tr pr_A_Producer_Preemp1 [0,w[ pr_A_Producer_Work1 -> pr_A_Producer_ContextSwitch CPU_Processor
tr pr_A_Producer_Preemp2 [0,w[ pr_A_Producer_ContextSwitch CPU_Processor -> pr_A_Producer_Work2
pl pr_A_Producer_Work1 (0)
pl pr_A_Producer_Work2 (0)
pl pr_A_Producer_ContextSwitch (0)
tr pr_A_Producer_Data_Sourcepr_A_Producer__Pop_Port [0,w[ pr_A_Producer_Data_Sourcepr_A_Producer__Store_Port -> pr_A_Producer_Data_Source_Bus
pl pr_A_Producer_Data_Sourcepr_A_Producer__Store_Port (0)
tr pr_A_Result_Consumer_Period_Event [20,20] pr_A_Result_Consumer_Hyperperiod -> pr_A_Result_Consumer_Clock
pl pr_A_Result_Consumer_Halted (1)
pl pr_A_Result_Consumer_Wait_For_Dispatch (0)
pl pr_A_Result_Consumer_Hyperperiod (1)
pl pr_A_Result_Consumer_Clock (0)
tr pr_A_Result_Consumer_Begin [0,w[ CPU_Processor pr_A_Result_Consumer_Data_Sinkpr_A_Result_Consumer__Store_Port pr_A_Result_Consumer_Clock pr_A_Result_Consumer_Wait_For_Dispatch -> pr_A_Result_Consumer_Work1 pr_A_Result_Consumer_Data_Sinkpr_A_Result_Consumer__Store_Port
tr pr_A_Result_Consumer_End [0,w[ pr_A_Result_Consumer_Work2 -> CPU_Processor pr_A_Result_Consumer_Wait_For_Dispatch
tr pr_A_Result_Consumer_Preemp1 [0,w[ pr_A_Result_Consumer_Work1 -> pr_A_Result_Consumer_ContextSwitch CPU_Processor
tr pr_A_Result_Consumer_Preemp2 [0,w[ pr_A_Result_Consumer_ContextSwitch CPU_Processor -> pr_A_Result_Consumer_Work2
pl pr_A_Result_Consumer_Work1 (0)
pl pr_A_Result_Consumer_Work2 (0)
pl pr_A_Result_Consumer_ContextSwitch (0)
tr pr_A_Result_Consumer_Data_Sinkpr_A_Result_Consumer__Push_Port [0,w[ pr_A_Result_Consumer_Data_Sinkpr_A_Result_Consumer__Store_Port pr_B_Result_Producer_Data_Source_Bus -> pr_A_Result_Consumer_Data_Sinkpr_A_Result_Consumer__Store_Port
pl pr_A_Result_Consumer_Data_Sinkpr_A_Result_Consumer__Store_Port (1)
tr pr_B_Consumer_Period_Event [20,20] pr_B_Consumer_Hyperperiod -> pr_B_Consumer_Clock
pl pr_B_Consumer_Halted (1)
pl pr_B_Consumer_Wait_For_Dispatch (0)
pl pr_B_Consumer_Hyperperiod (1)
pl pr_B_Consumer_Clock (0)
tr pr_B_Consumer_Begin [0,w[ CPU_Processor pr_B_Consumer_Data_Sinkpr_B_Consumer__Store_Port pr_B_Consumer_Clock pr_B_Consumer_Wait_For_Dispatch -> pr_B_Consumer_Work1 pr_B_Consumer_Data_Sinkpr_B_Consumer__Store_Port
tr pr_B_Consumer_End [0,w[ pr_B_Consumer_Work2 -> CPU_Processor pr_B_Consumer_Wait_For_Dispatch
tr pr_B_Consumer_Preemp1 [0,w[ pr_B_Consumer_Work1 -> pr_B_Consumer_ContextSwitch CPU_Processor
tr pr_B_Consumer_Preemp2 [0,w[ pr_B_Consumer_ContextSwitch CPU_Processor -> pr_B_Consumer_Work2
pl pr_B_Consumer_Work1 (0)
pl pr_B_Consumer_Work2 (0)
pl pr_B_Consumer_ContextSwitch (0)
tr pr_B_Consumer_Data_Sinkpr_B_Consumer__Push_Port [0,w[ pr_B_Consumer_Data_Sinkpr_B_Consumer__Store_Port pr_A_Producer_Data_Source_Bus -> pr_B_Consumer_Data_Sinkpr_B_Consumer__Store_Port
pl pr_B_Consumer_Data_Sinkpr_B_Consumer__Store_Port (1)
tr pr_B_Result_Producer_Period_Event [20,20] pr_B_Result_Producer_Hyperperiod -> pr_B_Result_Producer_Clock
pl pr_B_Result_Producer_Halted (1)
pl pr_B_Result_Producer_Wait_For_Dispatch (0)
pl pr_B_Result_Producer_Hyperperiod (1)
pl pr_B_Result_Producer_Clock (0)
tr pr_B_Result_Producer_Begin [0,w[ CPU_Processor pr_B_Result_Producer_Clock pr_B_Result_Producer_Wait_For_Dispatch -> pr_B_Result_Producer_Work1