FPGA support
Hi,
3 questions:
- In the FPGA demo video (very helpful btw!) a single VHDL Function block is used. Does TASTE already support multiple VHDL Function blocks (each with its single PI)?
- If a new entry is added to the Language list in the Function Attributes, does that mean a new dedicated code generator is created and should be somehow implemented? If yes, what exactly is to be developed and in which TASTE submodules?
- What definition would you give to a B mapper (for instance, in comparison with an A mapper)?
Thank you for your help.