Commit bb7ef95d authored by Thanassis Tsiodras's avatar Thanassis Tsiodras
Browse files

Simplified boolean expressions

parent 77f247c2
......@@ -347,7 +347,7 @@ def CreateGettersAndSetters(path, params, accessPathInC, node, names, leafTypeDi
elif isinstance(node, AsnReal):
CommonBaseImpl("REAL", "double", path, params, accessPathInC)
elif isinstance(node, AsnString):
if node._range == []:
if not node._range:
panic("Python_A_mapper: string (in %s) must have a SIZE constraint!\n" % node.Location()) # pragma: no cover
if isSequenceVariable(node):
CommonBaseImpl("OCTETSTRING", "long", path, params, accessPathInC + ".nCount", "Length")
......
......@@ -80,7 +80,7 @@ def OnStartup(unused_modelingLanguage, asnFiles, outputDir, unused_badTypes):
outputFilename = "Simulink_DataView_asn.m"
inform("QGenAda_A_mapper: Creating file '%s'...", outputFilename)
global g_outputFile
outputDir = outputDir + "../"
outputDir += "../"
g_outputFile = open(outputDir + outputFilename, 'w')
global g_definedTypes
g_definedTypes = {}
......@@ -210,7 +210,7 @@ def CreateDeclarationForType(nodeTypename, names, leafTypeDict):
elif isinstance(node, AsnReal):
CreateAlias(nodeTypename, "double", "range is %s" % str(node._range))
elif isinstance(node, AsnString):
if node._range == []:
if not node._range:
panic("QGenAda_A_mapper: string (in %s) must have a SIZE constraint!\n" % node.Location()) # pragma: no cover
name = CleanNameAsSimulinkWants(nodeTypename)
DeclareSimpleCollection(node, name, "uint8")
......
......@@ -189,7 +189,7 @@ def CreateDeclarationForType(nodeTypename, names, leafTypeDict):
elif isinstance(node, AsnReal):
CreateAlias(nodeTypename, "double", "range is %s" % str(node._range))
elif isinstance(node, AsnString):
if node._range == []:
if not node._range:
panic("QGenC_A_mapper: string (in %s) must have a SIZE constraint!\n" % node.Location()) # pragma: no cover
name = CleanNameAsSimulinkWants(nodeTypename)
DeclareSimpleCollection(node, name, "uint8")
......
......@@ -156,7 +156,7 @@ def RenderElements(controlString: str):
# This is a bug in pylint - scheduled to be fixed in next release, by:
# https://github.com/PyCQA/pylint/commit/6d31776454b5e308e4b869a1893b39083dca3146
newElement = g_doc.createElement(finalElementName) # pylint: disable=redefined-variable-type
if attributes != []:
if attributes:
for atr in attributes:
# This is a bug in pylint - scheduled to be fixed in next release, by:
# https://github.com/PyCQA/pylint/commit/6d31776454b5e308e4b869a1893b39083dca3146
......@@ -237,7 +237,7 @@ def OnBasic(nodeTypename, node, unused_leafTypeDict):
if isinstance(node, AsnString):
# An OCTET STRING must always include a range definition,
# otherwise SCADE will not be able to create C code!
if node._range == []:
if not node._range:
panic(("Scade612_A_mapper: string (in %s) must have a SIZE constraint inside ASN.1,\n" + # pragma: no cover
"or else SCADE can't generate C code!") % node.Location()) # pragma: no cover
controlString += 'Table,type,NamedType,type,TypeRef$name=char,size`Table,ConstValue$value=%d,' % node._range[-1]
......@@ -321,7 +321,7 @@ def OnSequenceOf(nodeTypename, node, unused_leafTypeDict):
g_declaredTypes.add(nodeTypename)
if HandleTypedef(nodeTypename):
return
if node._range == []:
if not node._range:
panic("Scade612_A_mapper: must have a SIZE constraint or else SCADE can't generate C code (in %s)!\n" % # pragma: no cover
node.Location()) # pragma: no cover
oid = GetOID(nodeTypename)
......
......@@ -185,7 +185,7 @@ def CreateDeclarationForType(nodeTypename, names, leafTypeDict):
elif isinstance(node, AsnReal):
CreateAlias(nodeTypename, "double", "range is %s" % str(node._range))
elif isinstance(node, AsnString):
if node._range == []:
if not node._range:
panic("Simulink_A_mapper: string (in %s) must have a SIZE constraint!\n" % node.Location()) # pragma: no cover
name = CleanNameAsSimulinkWants(nodeTypename)
DeclareSimpleCollection(node, name, "uint8")
......
......@@ -263,7 +263,7 @@ def CreateSequenceOf(nodeTypename, node, unused_leafTypeDict):
reftype = CleanName(reftype)
g_sqlOutput.write(' {reftype}_id int NOT NULL,\n'.format(
reftype=reftype))
if node._range != []:
if node._range:
constraint = 'CHECK(idx>=1 AND idx<=%s)' % (node._range[-1])
g_sqlOutput.write(" " + constraint + ",\n")
g_sqlOutput.write(
......
......@@ -410,7 +410,7 @@ def CreateSequenceOf(nodeTypename, node, unused_leafTypeDict):
reftype = node._containedType
reftype = CleanName(reftype)
constraint = ""
if node._range != []:
if node._range:
constraint = \
", CheckConstraint('idx>=0 AND idx<%s')" % (node._range[-1])
......
......@@ -567,11 +567,11 @@ def WriteCodeForGUIControls(prefix, parentControl, node, subProgram, subProgramI
g_MyClickPrototypes.write("void UpdateChoice_%s(wxCommandEvent& event);\n" % varPrefix)
g_SourceFile.write("void TeleCmds::UpdateChoice_%s(wxCommandEvent& event)\n{\n" % varPrefix)
count = 0
for child in node._members:
for unused_child in node._members:
g_SourceFile.write(" if (%d == _itemChoice_%s->GetCurrentSelection()) {\n" % (count, varPrefix))
g_SourceFile.write(" _itemStaticBoxSizer_%s->Show((size_t)%d);\n" % (varPrefix, count + 1))
oCount = 0
for child in node._members:
for unused_child2 in node._members:
if oCount != count:
g_SourceFile.write(" _itemStaticBoxSizer_%s->Show((size_t)%d);\n" % (varPrefix, oCount + 1))
oCount += 1
......
......@@ -268,7 +268,7 @@ def OnFinal():
g_PythonFile.write('\n'.join(g_bodyPython))
g_PythonFile.write('\n\n')
g_PythonFile.write('def ProcessTM(self):\n')
if g_TMprocessors == []:
if not g_TMprocessors:
g_PythonFile.write(' pass\n')
else:
g_PythonFile.write('\n'.join(g_TMprocessors))
......
......@@ -72,7 +72,7 @@ class FromQGenCToASN1SCC(RecursiveMapper):
def MapOctetString(self, srcQGenC, destVar, node, _, __):
lines = []
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
for i in range(0, node._range[-1]):
lines.append("%s.arr[%d] = %s.element_data[%d];\n" % (destVar, i, srcQGenC, i))
......@@ -120,7 +120,7 @@ class FromQGenCToASN1SCC(RecursiveMapper):
return lines
def MapSequenceOf(self, srcQGenC, destVar, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("need a SIZE constraint or else we can't generate C code (%s)!\n" % node.Location()) # pragma: no cover
isMappedToPrimitive = IsElementMappedToPrimitive(node, names)
lines = []
......@@ -153,7 +153,7 @@ class FromASN1SCCtoQGenC(RecursiveMapper):
return ["%s = %s;\n" % (dstQGenC, srcVar)]
def MapOctetString(self, srcVar, dstQGenC, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
lines = []
......@@ -204,7 +204,7 @@ class FromASN1SCCtoQGenC(RecursiveMapper):
return lines
def MapSequenceOf(self, srcVar, dstQGenC, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("need a SIZE constraint or else we can't generate C code (%s)!\n" % node.Location()) # pragma: no cover
isMappedToPrimitive = IsElementMappedToPrimitive(node, names)
lines = []
......@@ -235,7 +235,7 @@ class FromQGenCToOSS(RecursiveMapper):
def MapOctetString(self, srcQGenC, destVar, node, _, __):
lines = []
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
for i in range(0, node._range[-1]):
lines.append("%s.value[%d] = %s.element_data[%d];\n" % (destVar, i, srcQGenC, i))
......@@ -282,7 +282,7 @@ class FromQGenCToOSS(RecursiveMapper):
return lines
def MapSequenceOf(self, srcQGenC, destVar, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("(%s) needs a SIZE constraint or else we can't generate C code!\n" % node.Location()) # pragma: no cover
isMappedToPrimitive = IsElementMappedToPrimitive(node, names)
lines = []
......@@ -314,7 +314,7 @@ class FromOSStoQGenC(RecursiveMapper):
return ["%s = %s;\n" % (dstQGenC, srcVar)]
def MapOctetString(self, srcVar, dstQGenC, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
lines = []
for i in range(0, node._range[-1]):
......@@ -363,7 +363,7 @@ class FromOSStoQGenC(RecursiveMapper):
return lines
def MapSequenceOf(self, srcVar, dstQGenC, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("(%s) needs a SIZE constraint or else we can't generate C code!\n" % node.Location()) # pragma: no cover
isMappedToPrimitive = IsElementMappedToPrimitive(node, names)
lines = []
......
......@@ -64,7 +64,7 @@ class FromSCADEtoASN1SCC(RecursiveMapper):
def MapOctetString(self, srcScadeMacro, destVar, node, _, __):
lines = []
lines.append("{\n")
if node._range == []:
if not node._range:
panicWithCallStack(
"OCTET STRING (in %s) must have a SIZE constraint " # pragma: no cover
"inside ASN.1,\nor else SCADE can't generate C code!" % node.Location()) # pragma: no cover
......@@ -113,7 +113,7 @@ class FromSCADEtoASN1SCC(RecursiveMapper):
return lines
def MapSequenceOf(self, srcScadeMacro, destVar, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack(
"A SIZE constraint is required, or else SCADE can't generate C code (%s)!\n" % # pragma: no cover
node.Location()) # pragma: no cover
......@@ -147,7 +147,7 @@ class FromASN1SCCtoSCADE(RecursiveMapper):
return ["%s = (%s)?1:0;\n" % (dstScadeMacro, srcVar)]
def MapOctetString(self, srcVar, dstScadeMacro, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack(
"OCTET STRING (in %s) must have a SIZE constraint " # pragma: no cover
"inside ASN.1,\nor else SCADE can't generate C code!" % node.Location()) # pragma: no cover
......@@ -200,7 +200,7 @@ class FromASN1SCCtoSCADE(RecursiveMapper):
return lines
def MapSequenceOf(self, srcVar, dstScadeMacro, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack(
"A SIZE constraint is required or else SCADE can't generate C code (%s)!\n" % # pragma: no cover
node.Location()) # pragma: no cover
......@@ -242,7 +242,7 @@ class FromSCADEtoOSS(RecursiveMapper):
def MapOctetString(self, srcScadeMacro, destVar, node, _, __):
lines = []
lines.append("{\n")
if node._range == []:
if not node._range:
panicWithCallStack(
"OCTET STRING (in %s) must have a SIZE constraint " # pragma: no cover
"inside ASN.1,\nor else SCADE can't generate C code!" % node.Location()) # pragma: no cover
......@@ -290,7 +290,7 @@ class FromSCADEtoOSS(RecursiveMapper):
return lines
def MapSequenceOf(self, srcScadeMacro, destVar, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack(
"A SIZE constraint is required, or else SCADE can't generate C code (%s)!\n" % # pragma: no cover
node.Location()) # pragma: no cover
......@@ -323,7 +323,7 @@ class FromOSStoSCADE(RecursiveMapper):
return ["%s = (%s)?1:0;\n" % (dstScadeMacro, srcVar)]
def MapOctetString(self, srcVar, dstScadeMacro, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack(
"OCTET STRING (in %s) must have a SIZE constraint " # pragma: no cover
"inside ASN.1,\nor else SCADE can't generate C code!" % node.Location()) # pragma: no cover
......@@ -373,7 +373,7 @@ class FromOSStoSCADE(RecursiveMapper):
return lines
def MapSequenceOf(self, srcVar, dstScadeMacro, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack(
"A SIZE constraint is required or else SCADE can't generate C code (%s)!\n" % # pragma: no cover
node.Location()) # pragma: no cover
......
......@@ -69,7 +69,7 @@ class FromSimulinkToASN1SCC(RecursiveMapper):
def MapOctetString(self, srcSimulink, destVar, node, _, __):
lines = []
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
for i in range(0, node._range[-1]):
lines.append("%s.arr[%d] = %s.element_data[%d];\n" % (destVar, i, srcSimulink, i))
......@@ -117,7 +117,7 @@ class FromSimulinkToASN1SCC(RecursiveMapper):
return lines
def MapSequenceOf(self, srcSimulink, destVar, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("need a SIZE constraint or else we can't generate C code (%s)!\n" % node.Location()) # pragma: no cover
isMappedToPrimitive = IsElementMappedToPrimitive(node, names)
lines = []
......@@ -150,7 +150,7 @@ class FromASN1SCCtoSimulink(RecursiveMapper):
return ["%s = %s;\n" % (dstSimulink, srcVar)]
def MapOctetString(self, srcVar, dstSimulink, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
lines = []
......@@ -201,7 +201,7 @@ class FromASN1SCCtoSimulink(RecursiveMapper):
return lines
def MapSequenceOf(self, srcVar, dstSimulink, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("need a SIZE constraint or else we can't generate C code (%s)!\n" % node.Location()) # pragma: no cover
isMappedToPrimitive = IsElementMappedToPrimitive(node, names)
lines = []
......@@ -232,7 +232,7 @@ class FromSimulinkToOSS(RecursiveMapper):
def MapOctetString(self, srcSimulink, destVar, node, _, __):
lines = []
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
for i in range(0, node._range[-1]):
lines.append("%s.value[%d] = %s.element_data[%d];\n" % (destVar, i, srcSimulink, i))
......@@ -279,7 +279,7 @@ class FromSimulinkToOSS(RecursiveMapper):
return lines
def MapSequenceOf(self, srcSimulink, destVar, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("(%s) needs a SIZE constraint or else we can't generate C code!\n" % node.Location()) # pragma: no cover
isMappedToPrimitive = IsElementMappedToPrimitive(node, names)
lines = []
......@@ -311,7 +311,7 @@ class FromOSStoSimulink(RecursiveMapper):
return ["%s = %s;\n" % (dstSimulink, srcVar)]
def MapOctetString(self, srcVar, dstSimulink, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
lines = []
for i in range(0, node._range[-1]):
......@@ -360,7 +360,7 @@ class FromOSStoSimulink(RecursiveMapper):
return lines
def MapSequenceOf(self, srcVar, dstSimulink, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("(%s) needs a SIZE constraint or else we can't generate C code!\n" % node.Location()) # pragma: no cover
isMappedToPrimitive = IsElementMappedToPrimitive(node, names)
lines = []
......
......@@ -80,7 +80,7 @@ def RegistersAllocated(node):
elif realLeafType == "BOOLEAN":
retValue = 4
elif realLeafType == "OCTET STRING":
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -94,13 +94,13 @@ def RegistersAllocated(node):
elif isinstance(node, AsnChoice):
retValue = 4 + sum(RegistersAllocated(x[1]) for x in node._members)
elif isinstance(node, AsnSequenceOf):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
retValue = node._range[-1] * RegistersAllocated(node._containedType)
elif isinstance(node, AsnSetOf):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -188,7 +188,7 @@ class FromVHDLToASN1SCC(RecursiveMapper):
def MapOctetString(self, srcVHDL, destVar, node, _, __):
register = srcVHDL[0] + srcVHDL[1]
lines = []
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -263,7 +263,7 @@ class FromVHDLToASN1SCC(RecursiveMapper):
return lines
def MapSequenceOf(self, srcVHDL, destVar, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("need a SIZE constraint or else we can't generate C code (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -317,7 +317,7 @@ class FromASN1SCCtoVHDL(RecursiveMapper):
return lines
def MapOctetString(self, srcVar, dstVHDL, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if isSequenceVariable(node):
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -390,7 +390,7 @@ class FromASN1SCCtoVHDL(RecursiveMapper):
return lines
def MapSequenceOf(self, srcVar, dstVHDL, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("need a SIZE constraint or else we can't generate C code (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -492,7 +492,7 @@ static int g_bInitialized = 0;
class MapASN1ToVHDLCircuit(RecursiveMapper):
def MapInteger(self, direction, dstVHDL, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("INTEGERs need explicit ranges when generating VHDL code... (%s)" % node.Location()) # pragma: no cover
bits = math.log(max(abs(x) for x in node._range) + 1, 2)
bits += bits if node._range[0] < 0 else 0
......@@ -506,7 +506,7 @@ class MapASN1ToVHDLCircuit(RecursiveMapper):
return [dstVHDL + ' : ' + direction + 'std_logic;']
def MapOctetString(self, direction, dstVHDL, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -533,7 +533,7 @@ class MapASN1ToVHDLCircuit(RecursiveMapper):
return lines
def MapSequenceOf(self, direction, dstVHDL, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -550,7 +550,7 @@ class MapASN1ToVHDLCircuit(RecursiveMapper):
class MapASN1ToVHDLregisters(RecursiveMapper):
def MapInteger(self, _, dstVHDL, node, __, ___):
if node._range == []:
if not node._range:
panicWithCallStack("INTEGERs need explicit ranges when generating VHDL code... (%s)" % node.Location()) # pragma: no cover
bits = math.log(max(abs(x) for x in node._range) + 1, 2)
bits += (bits if node._range[0] < 0 else 0)
......@@ -564,7 +564,7 @@ class MapASN1ToVHDLregisters(RecursiveMapper):
return ['signal ' + dstVHDL + ' : ' + 'std_logic;']
def MapOctetString(self, _, dstVHDL, node, __, ___):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -591,7 +591,7 @@ class MapASN1ToVHDLregisters(RecursiveMapper):
return lines
def MapSequenceOf(self, _, dstVHDL, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -608,7 +608,7 @@ class MapASN1ToVHDLregisters(RecursiveMapper):
class MapASN1ToVHDLreadinputdata(RecursiveMapper):
def MapInteger(self, reginfo, dstVHDL, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("INTEGERs need explicit ranges when generating VHDL code... (%s)" % node.Location()) # pragma: no cover
# bits = math.log(max(map(abs, node._range)+1),2)+(1 if node._range[0]<0 else 0)
lines = []
......@@ -626,7 +626,7 @@ class MapASN1ToVHDLreadinputdata(RecursiveMapper):
return lines
def MapOctetString(self, reginfo, dstVHDL, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -661,7 +661,7 @@ class MapASN1ToVHDLreadinputdata(RecursiveMapper):
return lines
def MapSequenceOf(self, reginfo, dstVHDL, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -678,7 +678,7 @@ class MapASN1ToVHDLreadinputdata(RecursiveMapper):
class MapASN1ToVHDLwriteoutputdata(RecursiveMapper):
def MapInteger(self, reginfo, dstVHDL, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("INTEGERs need explicit ranges when generating VHDL code... (%s)" % node.Location()) # pragma: no cover
# bits = math.log(max(map(abs, node._range)+1),2)+(1 if node._range[0]<0 else 0)
lines = []
......@@ -696,7 +696,7 @@ class MapASN1ToVHDLwriteoutputdata(RecursiveMapper):
return lines
def MapOctetString(self, reginfo, dstVHDL, node, _, __):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -731,7 +731,7 @@ class MapASN1ToVHDLwriteoutputdata(RecursiveMapper):
return lines
def MapSequenceOf(self, reginfo, dstVHDL, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -757,7 +757,7 @@ class MapASN1ToSystemCconnections(RecursiveMapper):
return [dstCircuitPort + ' => ' + srcRegister]
def MapOctetString(self, srcRegister, dstCircuitPort, node, __, ___):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -786,7 +786,7 @@ class MapASN1ToSystemCconnections(RecursiveMapper):
return lines
def MapSequenceOf(self, srcRegister, dstCircuitPort, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -814,7 +814,7 @@ class MapASN1ToSystemCheader(RecursiveMapper):
return []
def MapOctetString(self, state, systemCvar, node, __, ___):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -841,7 +841,7 @@ class MapASN1ToSystemCheader(RecursiveMapper):
return []
def MapSequenceOf(self, state, systemCvar, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......@@ -865,7 +865,7 @@ class MapASN1ToOutputs(RecursiveMapper):
return [paramName]
def MapOctetString(self, paramName, _, node, __, ___):
if node._range == []:
if not node._range:
panicWithCallStack("OCTET STRING (in %s) must have a SIZE constraint inside ASN.1,\nor else we can't generate C code!" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("VHDL OCTET STRING (in %s) must have a fixed SIZE constraint !" % node.Location()) # pragma: no cover
......@@ -894,7 +894,7 @@ class MapASN1ToOutputs(RecursiveMapper):
return lines
def MapSequenceOf(self, paramName, dummy, node, leafTypeDict, names):
if node._range == []:
if not node._range:
panicWithCallStack("For VHDL, a SIZE constraint is mandatory (%s)!\n" % node.Location()) # pragma: no cover
if len(node._range) > 1 and node._range[0] != node._range[1]:
panicWithCallStack("Must have a fixed SIZE constraint (in %s) for VHDL code!" % node.Location()) # pragma: no cover
......
......@@ -51,7 +51,7 @@ g_upperFloat = 1e350
def verifyNodeRange(node):
assert isinstance(node, AsnBasicNode)
if isinstance(node, AsnInt):
if node._range == []:
if not node._range:
panic("INTEGER (in %s) must have a range constraint inside ASN.1,\n"\
"or else we might lose accuracy during runtime!" % node.Location())
#else:
......@@ -63,7 +63,7 @@ def verifyNodeRange(node):
# panic("INTEGER (in %s) must have a high limit <= 2147483647\n" % node.Location())
if isinstance(node, AsnReal):
if node._range == []:
if not node._range:
panic(
"REAL (in %s) must have a range constraint inside ASN.1,\n"\
"or else we might lose accuracy during runtime!" % node.Location())
......
......@@ -179,7 +179,7 @@ Members:
def __repr__(self):
result = self._leafType
if self._range != []:
if self._range:
result += " within [%s,%s]" % (self._range[0], self._range[1])
if self._iDefaultValue is not None:
result += " with default value of %s" % self._iDefaultValue # pragma: no cover
......@@ -237,7 +237,7 @@ Members:
if self._dbDefaultValue is not None:
result += ", default value of " # pragma: no cover
result += self._dbDefaultValue # pragma: no cover
if self._range != []:
if self._range:
result += ", default range"
result += " within [%s,%s]" % (self._range[0], self._range[1])
return result
......@@ -275,7 +275,7 @@ Members:
def __repr__(self):
result = self._leafType
if self._range != []:
if self._range:
result += ", length within "
result += str(self._range)
return result
......@@ -637,7 +637,7 @@ Members:
def __repr__(self):
result = self._leafType