Update: fix guard to RMAP calls, limit waiting for flag, and clean.

dmt/B_mappers/brave_B_mapper.py

@@ -423,16 +423,6 @@ class VHDLGlueGenerator(SynchronousToolGlueGeneratorGeneric[List[int], List[int]
 
 #include "C_ASN1_Types.h"
 //#include <stdint.h>
-/*
-#define GR740 	1
-#define X86   	0
-
-#if (GR740 == 1)
-#include <rtems/rtems/clock.h>
-#elif (X86 == 1)
-#include <time.h>
-#endif
-*/
 #ifndef STATIC
 #define STATIC
 #endif
@@ -467,8 +457,7 @@ class VHDLGlueGenerator(SynchronousToolGlueGeneratorGeneric[List[int], List[int]
 #define FPGA_ERROR              "error"
 #define FPGA_DISABLED           "disabled"
 
-//#define POLLING_PERIOD_NS       1000000
-//#define RETRIES                 4000
+#define RETRIES                 1000
 
 #ifdef _WIN32
 
@@ -495,22 +484,9 @@ static long long bswap64(long long x)
 #define __builtin_bswap64 bswap64
 
 #endif
-/*
-uint64_t ObtainTimeStamp ()
-{
-  struct timespec TimeStamp;
-#if (GR740 == 1)
-  rtems_clock_get_uptime(&TimeStamp);
-  return (uint64_t)(((uint64_t)TimeStamp.tv_sec * 1000000000L) + TimeStamp.tv_nsec);
-#elif (X86 == 1)
-  clock_gettime(CLOCK_MONOTONIC, &TimeStamp);
-  return (uint64_t)(((uint64_t)TimeStamp.tv_sec * 1000000000L) + (uint64_t)TimeStamp.tv_nsec);
-#endif
-}
 
-uint64_t ts_now, ts_prev;
 uint32_t count;
-*/
+
 #include "rmap123.h"
 
 #define R_RMAP_DSTADR 0xfe
@@ -552,12 +528,6 @@ unsigned int rmap_dst_address = R_RMAP_DSTADR; /* SpW Destination address. */
         self.C_SourceFile.write("    unsigned char flag = 0;\n\n")
         self.C_SourceFile.write("    // Now that the parameters are passed inside the FPGA, run the processing logic\n")
         
-        self.C_SourceFile.write('    // Check if FPGA is ready.\n')
-        self.C_SourceFile.write('    extern const char globalFpgaStatus_%s[];\n' % (self.CleanNameAsADAWants(maybeFVname)))
-        self.C_SourceFile.write('    if(strcmp(globalFpgaStatus_%s, FPGA_READY)){\n' % (self.CleanNameAsADAWants(maybeFVname)))
-        self.C_SourceFile.write('       return -1;\n')
-        self.C_SourceFile.write('    }\n')
-
         self.C_SourceFile.write('    unsigned char okstart = 1;\n')                                    
         self.C_SourceFile.write('    if (rmap_tgt_write(apb_base_address + %s, &okstart, 1, rmap_dst_address)) {\n' %
                                 hex(int(VHDL_Circuit.lookupSP[sp._id]._offset)))
@@ -566,30 +536,16 @@ unsigned int rmap_dst_address = R_RMAP_DSTADR; /* SpW Destination address. */
         self.C_SourceFile.write('    }\n')
         self.C_SourceFile.write('    LOGDEBUG(" - Write OK\\n");\n')
 
-        self.C_SourceFile.write('    //count = 0;\n')
-        self.C_SourceFile.write('    //ts_prev = ObtainTimeStamp();\n')
-        self.C_SourceFile.write("    while (!flag) {\n")
-        self.C_SourceFile.write('    //while(count < RETRIES){\n')
-        self.C_SourceFile.write("       // Wait for processing logic to complete\n")
-        self.C_SourceFile.write('       //ts_now = ObtainTimeStamp();\n')
-        self.C_SourceFile.write('       //if(ts_now >= ts_prev + POLLING_PERIOD_NS){\n')
-        self.C_SourceFile.write('           //ts_prev = ObtainTimeStamp();\n')
-        self.C_SourceFile.write('           //count++;\n')
-        self.C_SourceFile.write('           //actions\n')
-
-        self.C_SourceFile.write('           if (rmap_tgt_read(apb_base_address + %s, &flag, 1, rmap_dst_address)) {\n' %
+        self.C_SourceFile.write('    count = 0;\n')
+        self.C_SourceFile.write('    while (!flag && count < RETRIES){\n')
+        self.C_SourceFile.write("      // Wait for processing logic to complete\n")
+        self.C_SourceFile.write('      count++;\n')
+        self.C_SourceFile.write('      if (rmap_tgt_read(apb_base_address + %s, &flag, 1, rmap_dst_address)) {\n' %
                                 hex(int(VHDL_Circuit.lookupSP[sp._id]._offset)))
-        self.C_SourceFile.write('               LOGERROR("Failed reading Target\\n");\n')
-        self.C_SourceFile.write('               return -1;\n')
-        self.C_SourceFile.write('           }\n')
-        self.C_SourceFile.write('           LOGDEBUG(" - Read OK\\n");\n')
-    
-        self.C_SourceFile.write("           //if(flag) break;\n")
-        self.C_SourceFile.write('           // Recheck if FPGA is (still) ready.\n')
-        self.C_SourceFile.write('           //if(strcmp(globalFpgaStatus_%s, FPGA_READY)){\n' % (self.CleanNameAsADAWants(maybeFVname)))
-        self.C_SourceFile.write('           //    return -1;\n')
-        self.C_SourceFile.write('           //}\n')
-        self.C_SourceFile.write('       //}\n')
+        self.C_SourceFile.write('        LOGERROR("Failed reading Target\\n");\n')
+        self.C_SourceFile.write('        return -1;\n')
+        self.C_SourceFile.write('      }\n')
+        self.C_SourceFile.write('      LOGDEBUG(" - Read OK\\n");\n')
         self.C_SourceFile.write('    }\n')
         self.C_SourceFile.write('    return 0;\n')
 

dmt/B_mappers/synchronousTool.py

@@ -649,6 +649,13 @@ class SynchronousToolGlueGeneratorGeneric(Generic[TSource, TDestin]):
                     self.C_SourceFile.write('void *p' + self.CleanNameAsToolWants(param._id) + ', size_t *pSize_' + self.CleanNameAsToolWants(param._id))
             self.C_SourceFile.write(")\n{\n")
 
+            if subProgramImplementation.lower() == "c" and sp._fpgaConfigurations is not '':
+                self.C_SourceFile.write('    // Check if FPGA is ready.\n')
+                self.C_SourceFile.write('    extern const char globalFpgaStatus_%s[];\n' % (self.CleanNameAsADAWants(maybeFVname)))
+                self.C_SourceFile.write('    if(strcmp(globalFpgaStatus_%s, FPGA_READY)){\n' % (self.CleanNameAsADAWants(maybeFVname)))
+                self.C_SourceFile.write('       return -1;\n')
+                self.C_SourceFile.write('    }\n\n')
+
             # Decode inputs
             for param in sp._params:
                 nodeTypename = param._signal._asnNodename