Commit 26a73dd9 authored by Tiago Jorge's avatar Tiago Jorge
Browse files

Update: comment cyclic check and rmap code while checking 740 deployment issues

parent 07b28d68
......@@ -419,17 +419,17 @@ class VHDLGlueGenerator(SynchronousToolGlueGeneratorGeneric[List[int], List[int]
self.C_SourceFile.write('''
#include "C_ASN1_Types.h"
#include <stdint.h>
#define GR740 0
#define X86 1
//#include <stdint.h>
/*
#define GR740 1
#define X86 0
#if (GR740 == 1)
#include <rtems/rtems/clock.h>
#elif (X86 == 1)
#include <time.h>
#endif
*/
#ifndef STATIC
#define STATIC
#endif
......@@ -439,8 +439,8 @@ class VHDLGlueGenerator(SynchronousToolGlueGeneratorGeneric[List[int], List[int]
#define FPGA_ERROR "error"
#define FPGA_DISABLED "disabled"
#define POLLING_PERIOD_NS 1000000
#define RETRIES 4000
//#define POLLING_PERIOD_NS 1000000
//#define RETRIES 4000
#ifdef _WIN32
......@@ -467,7 +467,7 @@ static long long bswap64(long long x)
#define __builtin_bswap64 bswap64
#endif
/*
uint64_t ObtainTimeStamp ()
{
struct timespec TimeStamp;
......@@ -482,8 +482,8 @@ uint64_t ObtainTimeStamp ()
uint64_t ts_now, ts_prev;
uint32_t count;
#include "rmap123.h"
*/
//#include "rmap123.h"
''')
# self.g_FVname = subProgram._id
......@@ -550,31 +550,32 @@ uint32_t count;
#self.C_SourceFile.write(" BraveWriteRegister(g_Handle, BASE_ADDR + %s, (unsigned char)1);\n" %
# hex(int(VHDL_Circuit.lookupSP[sp._id]._offset)))
self.C_SourceFile.write(' count = 0;\n')
self.C_SourceFile.write(' ts_prev = ObtainTimeStamp();\n')
self.C_SourceFile.write(' while(count < RETRIES){\n')
self.C_SourceFile.write(' //count = 0;\n')
self.C_SourceFile.write(' //ts_prev = ObtainTimeStamp();\n')
self.C_SourceFile.write(" while (!flag) {\n")
self.C_SourceFile.write(' //while(count < RETRIES){\n')
self.C_SourceFile.write(" // Wait for processing logic to complete\n")
self.C_SourceFile.write(' ts_now = ObtainTimeStamp();\n')
self.C_SourceFile.write(' if(ts_now >= ts_prev + POLLING_PERIOD_NS){\n')
self.C_SourceFile.write(' ts_prev = ObtainTimeStamp();\n')
self.C_SourceFile.write(' count++;\n')
self.C_SourceFile.write(' //ts_now = ObtainTimeStamp();\n')
self.C_SourceFile.write(' //if(ts_now >= ts_prev + POLLING_PERIOD_NS){\n')
self.C_SourceFile.write(' //ts_prev = ObtainTimeStamp();\n')
self.C_SourceFile.write(' //count++;\n')
self.C_SourceFile.write(' //actions\n')
#self.C_SourceFile.write(" BraveReadRegister(g_Handle, BASE_ADDR + %s, &flag);\n" %
#self.C_SourceFile.write(" //BraveReadRegister(g_Handle, BASE_ADDR + %s, &flag);\n" %
# hex(int(VHDL_Circuit.lookupSP[sp._id]._offset)))
self.C_SourceFile.write(' if (rmap_tgt_read(remote_base_address, &flag, 1, remote_dst_address)) {\n')
self.C_SourceFile.write(' printf("Failed reading Target\\n");\n')
self.C_SourceFile.write(' exit(0);\n')
self.C_SourceFile.write(' }\n')
self.C_SourceFile.write(' printf(" - Read OK\\n");\n')
self.C_SourceFile.write(' //if (rmap_tgt_read(remote_base_address, &flag, 1, remote_dst_address)) {\n')
self.C_SourceFile.write(' // printf("Failed reading Target\\n");\n')
self.C_SourceFile.write(' // exit(0);\n')
self.C_SourceFile.write(' //}\n')
self.C_SourceFile.write(' //printf(" - Read OK\\n");\n')
self.C_SourceFile.write(" flag = 1; // a dummy BRAVE always work\n")
self.C_SourceFile.write(" if(flag) break;\n")
self.C_SourceFile.write(" //if(flag) break;\n")
self.C_SourceFile.write(' // Recheck if FPGA is (still) ready.\n')
self.C_SourceFile.write(' if(strcmp(globalFpgaStatus_%s, FPGA_READY)){\n' % (self.CleanNameAsADAWants(maybeFVname)))
self.C_SourceFile.write(' return -1;\n')
self.C_SourceFile.write(' }\n')
self.C_SourceFile.write(' }\n')
self.C_SourceFile.write(' //if(strcmp(globalFpgaStatus_%s, FPGA_READY)){\n' % (self.CleanNameAsADAWants(maybeFVname)))
self.C_SourceFile.write(' // return -1;\n')
self.C_SourceFile.write(' //}\n')
self.C_SourceFile.write(' //}\n')
self.C_SourceFile.write(' }\n')
self.C_SourceFile.write(' return 0;\n')
......
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