Commit 1bf553b8 authored by Thanassis Tsiodras's avatar Thanassis Tsiodras
Browse files

GMV/Tiago: Making the code pass flake8.

parent a909f323
......@@ -40,16 +40,13 @@ from typing import List
from ..commonPy.utility import panicWithCallStack
from ..commonPy.asnAST import (
AsnInt, AsnReal, AsnBool, AsnEnumerated, isSequenceVariable, sourceSequenceLimit,
AsnOctetString, AsnSequenceOrSet, AsnSequenceOrSetOf, AsnChoice, AsnNode,
AsnSequenceOf, AsnSetOf, AsnSequence, AsnSet, AsnMetaMember)
AsnOctetString, AsnSequenceOrSet, AsnSequenceOrSetOf, AsnChoice, AsnNode)
from ..commonPy.aadlAST import AadlPort, AadlParameter, ApLevelContainer, Param
from ..commonPy.asnParser import AST_Lookup, AST_Leaftypes
from ..commonPy.recursiveMapper import RecursiveMapper
from .synchronousTool import SynchronousToolGlueGenerator
import os
isAsynchronous = False
......@@ -454,7 +451,7 @@ class SimulinkGlueGenerator(SynchronousToolGlueGenerator):
self.C_SourceFile.write(" initialized = 1;\n")
self.C_SourceFile.write(" %s_initialize();\n" % self.g_FVname)
# If there are HW(FPGA) configurations defined, initialize also the HW side (the device driver: <self.g_FVname>_Simulink.vhdl.c).
if sp._fpgaConfigurations is not '':
if sp._fpgaConfigurations != '':
self.C_SourceFile.write(" init_%s_Fpga();\n" % maybeFVname)
self.C_SourceFile.write(" }\n")
......
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