Commit a41ee6f7 authored by Bruno Gomes's avatar Bruno Gomes

LIBIOP: remove old iop files dependency. Further cleanup executed.

refs #112663
parent cb85b22c
......@@ -17,7 +17,6 @@
#include <IOPgr1553b.h>
#include <IOPgr1553bc.h>
#include <IOPgr1553rt.h>
#include <IOPdriverconfig_interface.h>
uint32_t gr1553b_initialize(iop_device_driver_t *iop_dev, void *arg)
{
......@@ -59,8 +58,6 @@ uint32_t gr1553b_initialize(iop_device_driver_t *iop_dev, void *arg)
}
/* Clear pointers. These fields will be filled later*/
bdev->cl = NULL;
bdev->cl_size = 0;
bdev->buf_mem_start = (milstd_data_buf *) NULL;
bdev->sync = NULL;
bdev->last_read = NULL;
......@@ -104,13 +101,13 @@ uint32_t gr1553b_initialize(iop_device_driver_t *iop_dev, void *arg)
uint32_t gr1553b_open(iop_device_driver_t *iop_dev, void *arg)
{
/* Get driver priv struct */
iop_1553_device_t *device = (iop_1553_device_t *) iop_dev;
grb_priv *bdev = (grb_priv *) (device->dev.driver);
/* Get driver priv struct */
iop_1553_device_t *device = (iop_1553_device_t *) iop_dev;
grb_priv *bdev = (grb_priv *) (device->dev.driver);
/* return code */
air_status_code_e status = AIR_SUCCESSFUL;
/* Initialize the device according to the selected operative mode */
switch (bdev->user_config->operating_mode) {
......@@ -145,9 +142,9 @@ uint32_t gr1553b_open(iop_device_driver_t *iop_dev, void *arg)
uint32_t gr1553b_close(iop_device_driver_t *iop_dev, void *arg)
{
/* Get driver priv struct */
iop_1553_device_t *device = (iop_1553_device_t *) iop_dev;
grb_priv *bdev = (grb_priv *) (device->dev.driver);
/* Get driver priv struct */
iop_1553_device_t *device = (iop_1553_device_t *) iop_dev;
grb_priv *bdev = (grb_priv *) (device->dev.driver);
/* return code */
air_status_code_e status = AIR_SUCCESSFUL;
......
......@@ -29,12 +29,8 @@
#include <IOPgr1553rt.h>
#include <iop_error.h>
#include <IOPlibio.h>
#include <iop.h>
#include <bsp.h>
#include <IOPmilstd_config.h>
#include <IOPdriverconfig_interface.h>
#define GR1553RT_WRITE_MEM(adr, val) *(volatile uint32_t *)(adr) = (val)
......@@ -201,7 +197,7 @@ uint32_t gr1553rt_read(iop_device_driver_t *iop_dev, void *arg){
grb_priv *priv = (grb_priv *) (device->dev.driver);
/* user arguments*/
libio_rw_args_t *rw_args = (libio_rw_args_t *) arg;
iop_wrapper_t *wrapper = (iop_wrapper_t *) arg;
/* block descriptor */
struct gr1553rt_bd *bd;
......@@ -213,8 +209,8 @@ uint32_t gr1553rt_read(iop_device_driver_t *iop_dev, void *arg){
unsigned int buf_per_sub = priv->user_config->databufs_per_sub;
/* Verify if the user correctly provided data and header*/
if((rw_args->data == NULL) || (rw_args->hdr == NULL)){
/* Verify if the user correctly provided data*/
if(get_payload(wrapper->buffer) == NULL){
return AIR_INVALID_PARAM;
}
......@@ -248,16 +244,15 @@ uint32_t gr1553rt_read(iop_device_driver_t *iop_dev, void *arg){
if((wc > 0) /*&& (sw == 0)*/){
/* Insert data size */
rw_args->bytes_moved = rw_args->data_len = wc*2;
wrapper->buffer->payload_size= wc*2;
/* copy data to user's buffer */
memcpy(rw_args->data, (void *)bd->dptr, wc*2);
memcpy(get_payload(wrapper->buffer), (void *)bd->dptr, wc*2);
milstd_header_t * hdr = (milstd_header_t *)get_header(wrapper->buffer);
/* copy subaddress */
rw_args->hdr[0] = i;
/* header length is always 1*/
rw_args->hdr_len = 1;
hdr->address = i;
/* re-enable the block descriptor (unset data valid bit)*/
bd->ctrl = 0;
......@@ -310,9 +305,6 @@ uint32_t gr1553rt_write(iop_device_driver_t *iop_dev, void *arg){
iop_1553_device_t *device = (iop_1553_device_t *) iop_dev;
grb_priv *priv = (grb_priv *) (device->dev.driver);
/* user arguments*/
libio_rw_args_t *rw_args = (libio_rw_args_t *) arg;
/* subaddress table */
struct gr1553rt_sa *table = priv->sa_table;
......@@ -322,20 +314,21 @@ uint32_t gr1553rt_write(iop_device_driver_t *iop_dev, void *arg){
unsigned int suba;
unsigned int wc;
iop_wrapper_t *wrapper = (iop_wrapper_t *) arg;
milstd_header_t * hdr = (milstd_header_t *)get_header(wrapper->buffer);
/* Verify if user request does not exceed the maximum data size for milstd*/
if(rw_args->data_len > 64){
if(get_payload_size(wrapper->buffer) > 64){
return AIR_INVALID_CONFIG;
}
/* Verify if the user correctly provided data and header*/
if((rw_args->data == NULL) || (rw_args->hdr == NULL)){
/* Verify if the user correctly provided data*/
if(get_payload(wrapper->buffer) == NULL){
return AIR_INVALID_PARAM;
}
/* Get target subaddress */
suba = *((unsigned char *)rw_args->hdr) & 0x7F;
suba = hdr->address;
/* verify if we have a valid subaddress */
if((suba < 0) || (suba > 32)){
......@@ -350,7 +343,7 @@ uint32_t gr1553rt_write(iop_device_driver_t *iop_dev, void *arg){
bd = (struct gr1553rt_bd *) table->txptr;
/* get word count */
wc = rw_args->data_len/2;
wc = get_payload_size(wrapper->buffer)/2;
/* word count zero means 32 words */
if(wc == 32){
......@@ -370,13 +363,10 @@ uint32_t gr1553rt_write(iop_device_driver_t *iop_dev, void *arg){
}
/* copy data buffer */
memcpy((void *)bd->dptr, (void *)rw_args->data, rw_args->data_len);
memcpy((void *)bd->dptr, get_payload(wrapper->buffer), get_payload_size(wrapper->buffer));
/* insert word count in descriptor control word */
bd->ctrl = ((wc & 0x1F) << 3);
/* inform user of how much data was written*/
rw_args->bytes_moved = wc+2;
return AIR_SUCCESSFUL;
}
......@@ -49,7 +49,6 @@ extern "C" {
#include <iop.h>
#include <gr1553_support.h>
#include <IOPmilstd_config.h>
/*grb_user_config_t operating modes*/
#define GR1553B_MODE_BC 0x0 /**< Bus Controler Mode*/
......@@ -142,6 +141,14 @@ typedef struct {
typedef uint32_t milstd_data_buf[16];
/**
* @brief Store matching physical/virtual addresses used in the GR1553BC
*/
typedef struct {
uint32_t v_addr;
uint32_t p_addr;
} gr1553hwaddr;
/**
* @brief Internal BC driver structure
*/
......@@ -155,8 +162,10 @@ typedef struct {
void *mem_start; /**< pointer to device's memory */
/* bc specific */
bc_command_t *cl; /**< pointer to user's list */
unsigned int cl_size; /**< user command list size */
bc_command_t *cl; /**< pointer to user's list */
unsigned int cl_size; /**< user command list size */
unsigned int a_cl_size; /**< user async command list size */
struct gr1553bc_bd_tr *sync; /**< current bc command list */
struct gr1553bc_bd_tr *last_read; /**< current bc command list */
struct gr1553bc_bd_tr *async; /**< current bc asynchronous command list */
......@@ -166,6 +175,9 @@ typedef struct {
void *shortcut_cmd; /**< pointer to write_cmd_shortcut_t allocated memory */
unsigned int shortcut_offset; /**< index to where to put new shortcut */
gr1553hwaddr *hwlist; /**< physical to virtual adresses struct */
unsigned int data_buffer_size; /**< number of data commands */
/* rt specific */
struct gr1553rt_sa* sa_table; /**< Subaddress table used for RT mode */
struct gr1553rt_bd* bds_start; /**< Start Address for buffer descriptors */
......@@ -177,14 +189,6 @@ typedef struct {
} grb_priv;
/**
* @brief Store matching physical/virtual addresses used in the GR1553BC
*/
typedef struct {
uint32_t v_addr;
uint32_t p_addr;
} gr1553hwaddr;
/* Available Modes */
#define FEAT_BC 0x1
#define FEAT_RT 0x2
......
......@@ -43,10 +43,7 @@
#define __GR1553BC_H__
#include <iop.h>
#include <stdint.h>
#include <IOPgr1553b.h>
#include <IOPlibio.h>
#include <IOPmilstd_config.h>
/* A BC descriptor accessed as is */
struct gr1553bc_bd_raw {
......@@ -120,6 +117,4 @@ void gr1553bc_start_sync(grb_priv *priv);
air_status_code_e gr1553bc_add_async_data(grb_priv *priv, uint8_t *data, milstd_header_t *hdr, uint32_t size);
air_status_code_e gr1553bc_erase_async_data(grb_priv *priv);
unsigned long get_virtual_addr(unsigned long p_addr);
#endif
......@@ -39,10 +39,8 @@
#include <air.h>
#include <bsp.h>
#include <IOPlibio.h>
#include <IOPgrspw.h>
#include <spw_support.h>
#include <IOPdriverconfig_interface.h>
#define DBGSPW_IOCALLS 1
#define DBGSPW_TX 2
......
......@@ -20,7 +20,6 @@
#define __MIL1553BRM_H__
#include <iop.h>
#include <IOPlibio.h>
#ifdef __cplusplus
extern "C" {
......@@ -169,6 +168,7 @@ struct irq_log_list {
*/
typedef struct {
unsigned int memarea_base;
milstd_config_t * config;
struct brm_reg *regs; /**< BRM core registers */
/**
......@@ -347,32 +347,29 @@ typedef struct {
* Function set used to access the MilStd driver
* @{
*/
air_status_code_e brm_initialize(unsigned int major, unsigned int minor, void *arg);
air_status_code_e brm_open(unsigned int major, unsigned int minor, void *arg);
air_status_code_e brm_close(unsigned int major, unsigned int minor, void *arg);
air_status_code_e brm_read(unsigned int major, unsigned int minor, void *arg);
air_status_code_e brm_write(unsigned int major, unsigned int minor, void *arg);
air_status_code_e brm_control(unsigned int major, unsigned int minor, void *arg);
uint32_t brm_initialize(iop_device_driver_t *iop_dev, void *arg);
uint32_t brm_open(brm_priv *brm);
uint32_t brm_close(brm_priv *brm);
uint32_t brm_read(iop_device_driver_t *iop_dev, void *arg);
uint32_t brm_write(iop_device_driver_t *iop_dev, void *arg);
air_status_code_e brm_control(brm_priv *brm, void *arg);
unsigned int brm_get_operative_mode(int minor);
air_status_code_e brm_do_list(int minor);
air_status_code_e brm_list_done(int minor);
void *brm_get_memarea(int minor);
int brm_get_number_bc_blocks(int minor);
unsigned int brm_get_operative_mode(brm_priv *brm);
air_status_code_e brm_do_list(brm_priv *brm);
air_status_code_e brm_list_done(brm_priv *brm);
int brm_get_number_bc_blocks(brm_priv *brm);
void brm_bc_start_list(unsigned int minor);
void brm_bc_start_list(brm_priv *brm);
void brm_bc_stop_list(unsigned int minor);
void brm_bc_stop_list(brm_priv *brm);
air_status_code_e brm_bc_init_user_list(unsigned int minor);
air_status_code_e brm_bc_init_user_list(brm_priv *brm);
air_status_code_e brm_bc_process_completed_list(unsigned int minor,
libio_rw_args_t *rw_args);
uint32_t brm_bc_process_completed_list(iop_device_driver_t *iop_dev, void *arg);
air_status_code_e brm_bc_insert_new_data(unsigned int minor, uint8_t *data,
air_status_code_e brm_bc_insert_new_data(brm_priv *bDev, uint8_t *data,
milstd_header_t *hdr, unsigned int size);
/**@}*/
......
/**
* @file IOPdriverconfig_interface.h
*
* COPYRIGHT (c) 2011.
* GMV-SKYSOFT
*
* @author Cl�udio Silva
*
* The license and distribution terms for this file may be
* found in the file LICENSE at:
* http://www.rtems.com/license/LICENSE.
*
* @brief Contains driver configuration options
*
* Contains configuration options needed by the several drivers.
* Declares the "getter" functions for those configurations.
* To be auto generated by a configuration tool
*/
#ifndef _USERCONFIG_H
#define _USERCONFIG_H
#include <IOPlibio.h>
#ifdef __SPW_H__
#include <IOPgrspw.h>
/**
* @brief gets SpW internal driver structure
* @return pointer to SpW internal per core driver structure
*/
SPW_DEV *get_spw_devs();
/**
* @brief gets number of SpW v1 cores
* @return number of SpW v1 cores
*/
int get_number_spw_cores();
/**
* @brief gets number of SpW v2 cores
* @return number of SpW v2 cores
*/
int get_number_spw2_cores();
/**
* @brief gets SpW user configuration
* @return pointer to SpW configuration structure#spw_user_config
*/
spw_user_config * get_spw_config();
/**
* @brief gets SpW default configuration
* @return pointer to SpW configuration structure #spw_user_config
*/
spw_user_config * get_spw_defconfig();
/**
* @brief gets poiter to SpW memory are
* @return pointer to the beggining of the SpW allocated memory area
*/
void * get_spw_mem();
/**
* @brief gets pointer to SpW memory area
* @return pointer to the end of the SpW allocated memory area
*/
void * get_spw_memend();
/**
* @brief gets the size of SpW allocated memory
* @return SpW alocated memory size
*/
int get_spw_memsize();
#endif
#ifdef __MIL1553BRM_H__
#include <IOPmil1553brm.h>
/**
* @brief gets BRM internal driver structure
* @return pointer to BRM internal per core driver structure
*/
brm_priv *get_milstd_brm_priv();
/**
* @brief gets number of milstd cores
* @return number of milstd cores
*/
int get_number_milstd_cores();
/**
* @brief gets pointer to BRM memory are
* @return pointer to the beggining of the BRM allocated memory area
*/
void * get_milstd_mem();
/**
* @brief gets pointer to BRM memory area
* @return pointer to the end of the BRM allocated memory area
*/
void * get_milstd_memend();
/**
* @brief gets BRM user configuration
* @return pointer to BRM configuration structure #milstd_config_t
*/
milstd_config_t * get_milstd_config();
/**
* @brief get pointer to command list
* @return pointer to user command list
*/
bc_command_t *iop_milstd_get_command_list();
/**
* @brief get the number of commands in the list
* @return number of commands in list
*/
int iop_milstd_get_command_list_size();
#endif
#ifdef __GR1553B_H__
#include <IOPgr1553b.h>
/**
* @brief Get pointer of allocated physical/virtual addresses data stored for GR1553BC
* @return Pointer to allocated memory of physical/virtual addresses storage
*/
gr1553hwaddr *iop_get_gr1553hwlist();
/**
* @brief get pointer to command list
* @return Pointer to beginning of user command list
*/
bc_command_t *iop_milstd_get_command_list();
/**
* @brief Get the number of commands in user list
* @return Number of commands in list
*/
int iop_milstd_get_command_list_size();
/**
* @brief Get the number of commands in secondary transfer list
* @return Number of commands in asynchronous list
*/
int iop_milstd_get_async_command_list_size();
/**
* @brief get size data buffers
* @return size of data buffers
*/
int iop_milstd_get_data_buffers_size();
#endif
#endif
/**
* @file IOPlibio.h
*
* COPYRIGHT (c) 2011.
* GMV-SKYSOFT
*
* @author Cláudio Silva
*
* The license and distribution terms for this file may be
* found in the file LICENSE at:
* http://www.rtems.com/license/LICENSE.
*
* @brief Driver Interface Definition File
*
* This file defines the structures used as a driver interface
*/
#ifndef IOP_LIBIO_H
#define IOP_LIBIO_H
/**
* @brief structure used as an read/write interface with the drivers
*/
struct greth_args{
char *hdr; /**< Pointer to header */
int hdr_len; /**< Header length */
char *data; /**< pointer to data */
int data_len; /**< data length */
int bytes_moved; /**< bytes written or read by the driver*/
};
typedef struct greth_args libio_rw_args_t;
/**
* @brief structure used as an ioctl interface with the drivers
*/
typedef struct {
unsigned int command; /**< ioctl command */
void *buffer; /**< data needed for the ioctl command*/
unsigned int ioctl_return; /**< ioctl return code */
} libio_ioctl_args_t;
#endif
/**
* @file
* @brief This file contains the user configuration interface for the milstd bus
*
* COPYRIGHT (c) 2011.
* GMV-SKYSOFT
*
* @author Cludio Silva
*
* This is the generic part of the Bus Controller configuration interface and is
* independent of the target mil-std core.
*/
#ifndef __MILSTD_CONFIG_H__
#define __MILSTD_CONFIG_H__
/**
* @brief Bus Controller command block interface
*
* This interface is used to define a mil-std command list. Commands defined
* in this list are executed by the mil-std core. It is possible to branch
* between commands and to create dummy commands. The following options are
* available:
*
* ccw, bit 31 (T/B) : 0-Command is a transfer. 1-Command is a branch.
* bit 30:20 (N/A) : Reserved for future use
* bit 19 (DUM) : Dummy command. Do nothing but wait for timeslot.
* bit 18 (END) : End of list. Stop Transfers.
* bit 17 (ETRIG) : Wait for external trigger
* bit 16 (EXCL) : Time Slot is exclusive
* bit 15:14 (N/A) : Reserved
* bit 13 (AB) : Bus Selection 1 - Bus B, 0 - Bus A
* bit 12 (T/R) : Transmit or Receive
* bit 11:8 (NRET) : Number of Retries
* bit 7:5 (N/A) : Reserved
* bit 4:0 (Mode Code): Word Count/Mode Code Value
*
* rtaddr[0] and subaddr[0] : RT address and subaddress (for rt-rt receive addresses)
* rtaddr[1] and subaddr[1] : Only for RT-RT. Transmit addresses.
* subaddr[1] must be zero for non RT-RT transfers.
*
*/
typedef struct {
unsigned int ccw; /**< Command Control Word */
unsigned char rtaddr[2]; /**< RT address */
unsigned char subaddr[2]; /**< RT subaddress */
unsigned int branch_offset; /**< Branch offset */
unsigned int time_slot; /**< Time this command will use */
} bc_command_t;
#define TB_BIT 0x80000000
#define DUMMY_BIT 0x00080000
#define END_BIT 0x00040000
#define ETRIG_BIT 0x00020000
#define EXCL_BIT 0x00010000
#define BSEL_BIT 0x00002000
#define TR_BIT 0x00001000
#define AB_BIT 0x00002000
#define NRET_BITMASK 0x00000F00
#define MC_BITMASK 0x0000001F
#define CCW_BC_RT_A 0x00000400
#define CCW_BC_RT_B 0x00002400
#define CCW_RT_BC_A 0x00001400
#define CCW_RT_BC_B 0x00003400
#define CCW_RT_RT_A 0x00000400
#define CCW_RT_RT_B 0x00002400
#define CCW_DUMMY DUMMY_BIT
#define CCW_LOOP TB_BIT
#define CCW_END END_BIT
#endif
......@@ -10,6 +10,62 @@
#include <iop.h>
#include <iop_support.h>
/**
* @brief Bus Controller command block interface
*
* This interface is used to define a mil-std command list. Commands defined
* in this list are executed by the mil-std core. It is possible to branch
* between commands and to create dummy commands. The following options are
* available:
*
* ccw, bit 31 (T/B) : 0-Command is a transfer. 1-Command is a branch.
* bit 30:20 (N/A) : Reserved for future use
* bit 19 (DUM) : Dummy command. Do nothing but wait for timeslot.
* bit 18 (END) : End of list. Stop Transfers.
* bit 17 (ETRIG) : Wait for external trigger
* bit 16 (EXCL) : Time Slot is exclusive
* bit 15:14 (N/A) : Reserved
* bit 13 (AB) : Bus Selection 1 - Bus B, 0 - Bus A
* bit 12 (T/R) : Transmit or Receive
* bit 11:8 (NRET) : Number of Retries
* bit 7:5 (N/A) : Reserved
* bit 4:0 (Mode Code): Word Count/Mode Code Value
*
* rtaddr[0] and subaddr[0] : RT address and subaddress (for rt-rt receive addresses)
* rtaddr[1] and subaddr[1] : Only for RT-RT. Transmit addresses.
* subaddr[1] must be zero for non RT-RT transfers.
*
*/
typedef struct {
unsigned int ccw; /**< Command Control Word */
unsigned char rtaddr[2]; /**< RT address */
unsigned char subaddr[2]; /**< RT subaddress */
unsigned int branch_offset; /**< Branch offset */
unsigned int time_slot; /**< Time this command will use */
} bc_command_t;
#define TB_BIT 0x80000000
#define DUMMY_BIT 0x00080000
#define END_BIT 0x00040000
#define ETRIG_BIT 0x00020000
#define EXCL_BIT 0x00010000
#define BSEL_BIT 0x00002000
#define TR_BIT 0x00001000
#define AB_BIT 0x00002000
#define NRET_BITMASK 0x00000F00
#define MC_BITMASK 0x0000001F
#define CCW_BC_RT_A 0x00000400
#define CCW_BC_RT_B 0x00002400
#define CCW_RT_BC_A 0x00001400
#define CCW_RT_BC_B 0x00003400
#define CCW_RT_RT_A 0x00000400
#define CCW_RT_RT_B 0x00002400
#define CCW_DUMMY DUMMY_BIT
#define CCW_LOOP TB_BIT
#define CCW_END END_BIT
typedef struct {
/* Generic device configuration */
iop_device_driver_t dev;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment